Multi-dimensional associative search engine

ABSTRACT

A device for, and method of, storing data in a memory, and for extracting the data therefrom based on a multi-dimensional input (MDI) key, the device including a first and at least a second associative search engine (ASE), each including: (i) a memory having: (A) a first array of cells containing a field of entries, each of the cells being accessible via an input key including a string corresponding to at least a portion of the MDI key, and (B) a second array of cells having a plurality of associated data entries, each of the associated data entries being associated with a particular one of the entries in the first array, and (ii) control logic for operatively connecting the first and the second ASE, the control logic for processing at least a portion of the entries in the first array from each ASE, in response to the input key, so as to determine a match between the input key and an entry of said entries in said field; the control logic for producing a result pertaining to an associated data entry based on the determination, and wherein the control logic utilizes the result from the first ASE in the processing of the second ASE, so as to narrow searching within the second ASE.

This application draws priority from U.S. Provisional Patent ApplicationSer. No. 60/337,143, filed Dec. 10, 2001.

FIELD AND BACKGROUND OF THE INVENTION

The present invention relates to associative search engines (ASEs) and,in particular, to associative search engines for performing operationson multi-dimensional entries having associated data or actions, inresponse to a multi-dimensional input key.

Packet classification, a well-known problem in computer science, can bedefined as follows: given a data packet with certain predefined multiplecomponents, also called packet fields, and an action taken onfield-specific packet, this packet can be sorted on the basis of adifferent action to be taken. Classification is the action of sorting,among all the data packets, the packets that result in the same action.

The set of rules that determines the class to which the packet belongs,is stored in an information base called Classification Information Base(CIB) or a Classifier. The relevant components or fields of a specificdata packet classification are assembled into a construct called aClassification Key. The Classification Key forms a CIB query, whichresults in a specific action to be taken on the packet. Since theClassification Key incorporates multiple fields, and since the CIBresults are multiple-field dependent, the result is defined as aMulti-Field Classification.

The CIB structuring, classification methods and CIB maintenance areconsidered to be a very important problem, but a difficult one toresolve, and has been subject to extensive research for the last 30years. Computational Geometry, a relatively new branch of mathematics,emerged in the late 1970s and has been extensively used to explorevarious alternatives (J. Goodman et al., “Discrete and ComputationalGeometry”, CRC Press 1997; de Berg et al., “Computational Geometry,Algorithms and Applications”, Springer-Verlag 2000).

These topics began to receive special attention once it became clearthat classification is of strategic importance in data communications.The recognition of classification as a performance and intelligencebottleneck arose with the Internet's performance and functionality. Thisbottleneck was noticed in the early 1990s, and began to receivesignificant academic attention in the second half of the decade. A floodof research work has been published on the topic (P. Gupta, et al.,“Algorithms for Packet Classification”, IEEE Network, March/April 2001pp. 24-32).

A very interesting approach is taken by T. Lakshman, et al., in“High-Speed Policy-based Packet Forwarding Using EfficientMultidimensional Range Matching”, ACO Computing Communication Review28(4) pp. 203-214, ACM SIGCOMM'98 (September 1998). This approach isdifferent from a Trie-based approach, and utilizes the so called “bitparallelism”. The use of multi-dimensional range matches is innovative,however, the design practically limits the implementation hardware toseveral thousand rules and to a classification rate not higher thanseveral million classifications per second.

Today, there are two main-stream approaches to Classifier design (seeLakshman, et al.) in a router or a switch: algorithmic and TCAM.

The Algorithmic Approach

In the algorithmic approach, the CIB consists of either:

-   -   a general-purpose microprocessor, a micro-controller, or a        network processor, which executes the algorithm embedded in a        low-performance/low-cost memory.        -   The microprocessor fetches data from the memory and makes a            decision from where to fetch memory data in the next step.            This continues for many steps until the classification is            completed. Since the performance requirements are not very            high, a cheap but reasonable solution can be worked out (see            Decasper, et al., “Router plugins: a software architecture            for next-generation routers”, IEEE/ACM Trans. Networking,            8(1):2-15, February 2000), or    -   a dedicated ASIC or Search Engine: This type of solution is        based upon a specially built processor optimized for fast and        efficient execution of the classification task.        -   To this end, the search engine incorporates specialized            hardware, which executes an algorithmic step in a single            clock cycle. Also, the engine interfaces with the memory via            a very wide data bus, in order to reduce the number of            steps. This facilitates bringing in sufficient amount of            data to make a more intelligent step towards a solution            (see C. Semeria, “Implementing a Flexible Hardware-based            Router for the New IP Infrastructure”, Juniper Networks,            September 2001).

The algorithms typically used in both cases are Trie data structures(see Gupta, et al.). All these algorithms are multiple step algorithms,some of which execute a search in fewer steps than others. Typically,those algorithms that are extremely fast, executing a classification ina very few clocks, cause an exponential explosion in the requisiteamount of storage space. This results in a very bulky, power-consumingsolution. Those algorithms that are optimized for low storagerequirements are very slow, and do not meet the performance criteria ofhigh-performance routers.

In most cases, there is an additional problem due to backtracking, whichresults when an algorithm reaches a dead-end and the search must eitherstart over in a completely different direction, or backtrack one or moresteps and restart from there.

Due to the restricted memory bus bandwidth, these methods also end uptaking a long time for CIB maintenance.

The Ternary CAM (TCAM) Approach

The TCAM approach is quite popular, currently, especially forhigh-performance classification duties (see M. Peng et al.,“Content-Addressable memory (CAM) and its network applications”,International IC—Korea Conference proceedings, Altera InternationalLtd.). The TCAM advantage lies in the capability of performing oneclassification in every clock cycle. Consequently, TCAMs are consideredto be the fastest classification solution available today. In addition,TCAMs have a deterministic classification time, as they classify alwaysin a single clock cycle. TCAMs, however, are not problem-free:

-   -   Since TCAMs compare all entries at-once with the classification        Key, they consume excessive amounts of power and tend to        overheat.    -   Despite the ability to perform one classification per clock        cycle, TCAMs are relatively slow in comparison to SRAMs (or        DRAMs) developed using the same process technology and the same        circuit design style. A TCAM can run classifications at about        one fifth the rate of a similar SRAM. This is due to the TCAM        cell complexity and density.    -   TCAMs are not scalable in their widths. The widest        classification word that a modern TCAM supports today has a        width of 576 bits. Hence, there is a limit to the number of        fields and field-width that TCAM-based Classifiers can handle.        The scalability limitations of TCAM-based CIBs often constrain        router intelligence and performance.    -   TCAMs are architecturally limited in the number of        classification rules they handle, because a limited number of        TCAM components can be used in a single CIB. Today, this is not        an issue, due to a limited size of classification rules in a        Classifier. However, it may become an issue in a year or two.    -   TCAMs are storage inefficient. A TCAM word can be programmed to        several fixed widths. For instance, if a TCAM supports 36, 72,        144, 288 and 576 key widths, then if the CIB requires 128-bit        keys, 16 bits are unutilized in every key entry. This waste is        typically worse for longer classification keys. Also, TCAM are        inherently limited in the way that they can handle fields.        Fields can use ranges, which are power-of-2 integers rather than        ANY integer. This does not eliminate the possibility to express        any rule, but it may become highly-storage-inefficient and        therefore impractical.    -   In certain cases, a precisely expressed classification rule        requires a flag-based logical expression. It is not viable to        economically support such expressions inside the TCAM.        Therefore, designers must resort to external hardware to        construct such an expression and then use the output signal as a        bit to drive the TCAM. This is not only expensive, but is        hardwired, and therefore puts a limit on the flexibility of the        solution. Ideally, one would be able to create any flag-based        logical expression through reprogramming, since this would        enable a great flexibility and incremental improvement by        resorting to new software versions rather than to changes in        hardware.        -   Thus, an 18M ternary-bit TCAM, which theoretically stores            over 147,000 classification rules, 128 bits per rule,            statistically fits in only about 80,000 classification            rules. Nonetheless, this is considered quite reasonable,            when compared to the limitations of the fast algorithmic            trie-based methods.    -   It is important to remember that the wider the classification        key, the slower the TCAM. For instance, a state-of-the-art TCAM,        configured for a word-width of 144 bits, runs on a 66 MHz clock;        the same TCAM, when configured for a word-width of 576 bits,        operates on a 25 MHz clock.    -   TCAM maintenance is not autonomous. An external processor        manages the TCAM address space. This occupies a great deal of        the processor bandwidth as well as the write-up and the        verification of the maintenance software drivers.

There is therefore a recognized need for, and it would be highlyadvantageous to have, a device for, and a method of performingoperations on multi-dimensional entries having associated data oractions characterized by high storage efficiency and reduced powerconsumption, with respect to prior art devices and methods. It would beof further advantage if the inventive device and method would provideunlimited scalability, both horizontally (in terms of the number offields and field width) and vertically (in terms of the number ofclassification rules), and in addition, would have a classificationclock that is independent of the classification key width.

SUMMARY OF THE INVENTION

The present invention is a method of, and device performing operationson multi-dimensional entries having associated data or actions, inresponse to a multi-dimensional input key, using associative searchengines. The utility of Multi-Dimensional Ranges (MDRs) in compactlyrepresenting multi-field information bases is shown. The presentinvention is particularly suitable for packet classification in thecommunications field.

According to the teachings of the present invention there is provided adevice for storing data in a memory, and for extracting the datatherefrom based on a multi-dimensional input (MDI) key, the deviceincluding a first and at least a second associative search engine (ASE),each including: (i) a memory having: (A) a first array of cellscontaining a field of entries, each of the cells being accessible via aninput key including a string corresponding to at least a portion of theMDI key, and (B) a second array of cells having a plurality ofassociated data entries, each of the associated data entries beingassociated with a particular one of the entries in the first array, and(ii) control logic for operatively connecting the first and the secondASE, the control logic for processing at least a portion of the entriesin the first array from each ASE, in response to the input key, so as todetermine a match between the input key and an entry of the entries inthe field; the control logic for producing a result pertaining to anassociated data entry based on the determination, and wherein thecontrol logic utilizes the result from the first ASE in the processingof the second ASE, so as to narrow searching within the second ASE.

According to another aspect of the present invention there is provided amethod of storing data in a memory, and for extracting the datatherefrom based on a multi-dimensional input (MDI) key, the methodincluding the steps of: (a) providing a device including: (i) a firstand at least a second associative search engine (ASE), each ASEincluding: (A) a memory including: (I) a first array of cells containinga field having a plurality of entries, and (II) a second array of cellshaving a plurality of associated data entries, wherein each of theassociated data entries is associated with a particular one of theentries in the first array, and (B) control logic for the memory; (b)inputting an input key to each ASE, the input key including a stringcorresponding to at least a portion of the MDI key; (c) processing atleast a portion of the entries in the first array from each ASE, inresponse to the input key, so as to make a determination if there existsa match between the input key and an entry of the entries in the field;(d) producing a result based on this determination, the resultpertaining to at least one of the associated data entries, and (e)utilizing the result from the first ASE in the processing of step (c) ofthe second ASE.

According to yet another aspect of the present invention there isprovided a method of storing data in a memory, and for extracting thedata therefrom based on a multi-dimensional input (MDI) key, the methodincluding the steps of: (a) providing a device including: (i) aplurality of associative search engines (ASEs) including a first ASE andat least a second ASE, each ASE including: (A) a memory including: (I) afield containing a first array of cells, and (II) a second array ofcells, and (B) control logic for the memory; (b) storing a plurality ofentries within the first array of cells, such that the field isaccessible via an input key including a string, the string correspondingto at least a portion of the MDI key, wherein the entries in the firstarray of at least one of the first ASE and the second ASE include rangeboundary information; (c) storing a plurality of associated data entrieswithin the second array of cells, such that each of the associated dataentries is associated with a particular one of the entries in the firstarray, and (d) processing the plurality of associated data entries so asto convert overlapping ranges within the range boundary information intodisjoint ranges.

According to further features in the described preferred embodiments,each field is configured so as to correspond to at least a portion ofthe MDI key.

According to still further features in the described preferredembodiments, each field is configured so as to correspond to a differentportion of the MDI key.

According to still further features in the described preferredembodiments, the result from the first ASE is incorporated within theinput key of the second ASE.

According to still further features in the described preferredembodiments, the device further includes: (c) at least one concatenatingelement for concatenating the result from the first ASE in the input keyof the second ASE to form a concatenated input key.

According to still further features in the described preferredembodiments, each concatenating element is operatively paired with eachat least second ASE.

According to still further features in the described preferredembodiments, the device further includes: (c) at least one selectingelement for selecting, based on the result from the first ASE, a portionof the field within the first array of the second ASE so as to narrowthe searching within the second ASE.

According to still further features in the described preferredembodiments, the result includes a match indicator.

According to still further features in the described preferredembodiments, the field of entries in the first array of at least one ofthe first and second ASE includes range boundary information.

According to still further features in the described preferredembodiments, the first array has at least two dimensions, the firstarray consisting of rows and columns, the second array has at least twodimensions, the second array consisting of rows and columns, and whereineach of the associated data entries has a unique pair of row and columnindices for association with a unique pair of row and column indices ofa particular one of the entries within the field of entries.

According to still further features in the described preferredembodiments, the entries in the field of at least one ASE includessingle integer data, and wherein the field of entries of an ASE of theat least a second ASE includes range boundary information.

According to still further features in the described preferredembodiments, the concatenating element is designed and configured suchthat the result forms at least one most significant bit of theconcatenated input key.

According to still further features in the described preferredembodiments, the field of entries within the first array is maintainedin a monotonic order.

According to still further features in the described preferredembodiments, the field including single integer data is disposed withinthe first ASE.

According to still further features in the described preferredembodiments, the processing of the entries within the field of the firstASE and the field of the at least second ASE is sequentially orderedsuch that a single integer data field is processed first.

According to still further features in the described preferredembodiments, the processing of the entries within the field of the firstASE and the field of the at least second ASE is sequentially orderedsuch that: (i) any single integer data fields are processed prior torange fields, and (ii) among the range fields, more disjoint fields areprocessed prior to less disjoint fields.

According to still further features in the described preferredembodiments, at least two of the first ASE and the at least second ASEare configured to handle a long string of a single dimension of the MDIkey, the device being designed and configured to split the long stringinto at least two input keys, each of the input keys for inputting intoa different one of the first ASE and the second ASE.

According to still further features in the described preferredembodiments, the MDI key is one of a series of MDI keys, the devicebeing designed and configured to process portions of the MDI keys bypipelining, so as to improve a performance of the device.

According to still further features in the described preferredembodiments, the MDI key is one of a series of MDI keys, the seriesrepresented by k₀ . . . k_(m), k_(m+1) . . . k_(n), wherein:

k is one of the MDI keys,

k₀ is a first of the MDI keys,

n is a number of a last of the MDI keys, n≧1, and

m is a number of one of the MDI keys, n≧m+1,

and wherein at least two ASEs of the first ASE and the at least secondASE are designed and configured to process portions of the MDI keys bypipelining, such that the second of the ASEs processes a portion of keyk_(m) while a first of the ASEs processes a different portion of keyk_(m+1), so as to improve a performance of the device.

According to still further features in the described preferredembodiments, the range boundary information is a single range-boundaryvalue.

According to still further features in the described preferredembodiments, the memory is designed and configured to include: (C) rangevalidity information for each of the range boundary information.

According to still further features in the described preferredembodiments, each range boundary value is disposed in a separate memorycell of the first array, so as to produce a monotonic order.

According to still further features in the described preferredembodiments, each ASE further includes: (iii) sorting means forarranging the range boundary information in a monotonic order within thefirst array.

According to still further features in the described preferredembodiments, the associative search engine further includes: (iii)output means for outputting the result.

According to still further features in the described preferredembodiments, the first ASE and the at least second ASE are disposedwithin a single chip.

According to still further features in the described preferredembodiments, the at least one concatenation element is disposed withinthe at least second ASE.

According to still further features in the described preferredembodiments, the MDI key includes an IPv4 classification key.

According to still further features in the described preferredembodiments, the MDI key includes an Ipv6 classification key.

According to still further features in the described preferredembodiments, the processing step of the method includes searching, andthe utilizing step is performed so as to narrow the searching within thesecond ASE.

According to still further features in the described preferredembodiments, the utilizing step includes incorporating the result fromthe first ASE in the input key of the second ASE.

According to still further features in the described preferredembodiments, the utilizing step includes concatenating the result fromthe first ASE in the input key of the second ASE to form a concatenatedinput key.

According to still further features in the described preferredembodiments, the utilizing step includes selecting a sub-set of theentries in the first array of the second ASE, based on the result fromthe first ASE, the sub-set being smaller than the plurality of entriesin the first array of the second ASE.

According to still further features in the described preferredembodiments, the result is a singular result obtained by pre-processingover disjoint ranges.

According to still further features in the described preferredembodiments, the result is a singular result selected from at least tworesults derived from overlapping ranges by post-processing usingpriority rules.

According to still further features in the described preferredembodiments, the concatenating is performed such that the result formsat least one most significant bit of the concatenated input key.

According to still further features in the described preferredembodiments, the processing to produce the disjoint ranges is based onat least one pre-determined priority rule.

According to still further features in the described preferredembodiments, the processing to produce the disjoint ranges ispre-processing.

According to still further features in the described preferredembodiments, the processing further includes identifying at least oneredundant data entry, the redundant data entry being redundant with aparticular data entry among the associated data entries.

According to still further features in the described preferredembodiments, the processing further includes eliminating the at leastone redundant data entry so as to save space in the memory.

According to still further features in the described preferredembodiments, corresponding to the at least one redundant data entry isat least one entry of the entries in the field, the processing furtherincluding re-associating the entry in the field with the particular dataentry among the associated data entries.

According to still further features in the described preferredembodiments, corresponding to the at least one redundant data entry andthe particular data entry are a particular plurality of entries in thefield, the processing further including separating out the particularplurality of data entries in the field as a common factor, so as to savespace in the memory.

RSE devices of the present invention, built with simple or compoundmodules and integrated with Concatenation Logic, provideMulti-Dimensional Range Search Engines having capabilities that areunique to RSE, such as storage of any number of rules, number of fieldsand field widths, and scalability options to build an information baseof any size with little or no glue logic. This yields RSE devices withan unlimited number of classification fields and an unlimitedclassification field width.

The use of tags in the search procedures in the Multi-DimensionalRanges, along with the storage efficiency advantages of the inventiverange representation over the prefix notation used in conventional CIDRaddress ranges, and the benefits of RSEs in performance, powerconsumption, flexibility and scalability, result in significantly higherdensity, performance and scalability for packet classification ascompared with state-of-the-art Ternary CAMs (TCAMs).

BRIEF DESCRIPTION OF THE DRAWINGS

The invention is herein described, by way of example only, withreference to the accompanying drawings. With specific reference now tothe drawings in detail, it is stressed that the particulars shown are byway of example and for purposes of illustrative discussion of thepreferred embodiments of the present invention only, and are presentedin the cause of providing what is believed to be the most useful andreadily understood description of the principles and conceptual aspectsof the invention. In this regard, no attempt is made to show structuraldetails of the invention in more detail than is necessary for afundamental understanding of the invention, the description taken withthe drawings making apparent to those skilled in the art how the severalforms of the invention may be embodied in practice.

In the drawings:

FIG. 1 is a graphical illustration of the combination of two overlappingranges and the resulting equivalent set of non-overlapping ranges;

FIG. 2 is a graphical illustration of the key search process within anon-overlapping range, and the corresponding associated data;

FIG. 3 is an exemplary aggregation of three contiguous CIDR addressesaccording to a range representation of the present invention;

FIG. 4 is a Two-Dimensional Range Representation

²;

FIG. 5 is a Three-Dimensional Range Representation

³;

FIG. 6 is a Proper Two-Dimensional Sub-Range of a Two-Dimensional Range;

FIG. 7 illustrates Overlapping Two-Dimensional Ranges;

FIG. 8 illustrates Disjoint Two-Dimensional Ranges;

FIG. 9 shows a Two-Dimensional Inverse of a Range;

FIG. 10 provides a Graphical Demonstration of the First DistributiveLaw;

FIG. 11 provides a Graphical Demonstration of the Second DistributiveLaw;

FIG. 12 is a Graphical Demonstration of the First “De Morgan” Law for aTwo-Dimensional Range;

FIG. 13 is a Graphical Demonstration of the Second “De Morgan” Law for aTwo-Dimensional Range;

FIG. 14 is a Graphical Demonstration of Priority Definition to ResolveAny Conflict Between Overlapping d-Dimensional Ranges;

FIG. 15 provides a Graphical Demonstration of the First Distributive Lawfor Two-Dimensional Overlapping Ranges;

FIG. 16 provides a Graphical Demonstration of the Second DistributiveLaw for Two-Dimensional Overlapping Ranges;

FIG. 17 is a Graphical Demonstration of the First “De Morgan” Law for aTwo-Dimensional Range;

FIG. 18 is a Graphical Demonstration of the Second “De Morgan” Law for aTwo-Dimensional Range;

FIG. 19 a provides a Basic Implementation of a Classification ProcedureUsing ASE with Key Memory, Associated Data Memory and Control Logic;

FIG. 19 b provides an Alternative Implementation of a ClassificationProcedure Using ASE with Key Memory, Associated Data Memory and RangeSelector;

FIG. 19 c illustrates a Basic Implementation of a ClassificationProcedure Using RSE with Key Memory, Associated Data Memory andConcatenation Logic, according to the present invention;

FIG. 20 illustrates a Method of a Two-Dimensional Key Search in aTwo-Dimensional Range, according to the present invention;

FIG. 21 illustrates a Generalized Method of a d-Dimensional Key Searchin a d-Dimensional Range;

FIG. 22 is a schematic illustration of d Concatenated RSE devices (withinternal Concatenation Logic) forming a d-Dimensional CIB;

FIG. 23 is a schematic illustration of Concatenated RSE Devices forminga Single RSE within a d-Dimensional CIB;

FIG. 24 shows an IPv4 Classification Key of the background art;

FIG. 25 shows a Generic Arrangement of RSE Sections for Classifying aSubmitted IPv4 Classification Key;

FIG. 26 provides an Implementation of Sequential Classification using aSingle RSE;

FIG. 27 provides an Implementation of Pipelined Classification using SixRSE Devices;

FIG. 28 provides an Implementation of a Partially PipelinedClassification having two RSE Devices Combining Internally Sequentialwithin Externally Parallel Operation;

FIG. 29 is a schematic arrangement of Four RSE Sections for IPv6Forwarding;

FIG. 30 is a schematic illustration of a Fully Pipelined d-DimensionalKey Search Using d RSE Devices;

FIG. 31 a shows Rule R1 for Two Disjoint Two-Dimensional Ranges withOverlapping Projections in y Direction;

FIG. 31 b is a Link Diagram for Rule R₁;

FIG. 32 a shows Rule R₂ for two Disjoint Two-Dimensional Ranges withOverlapping Projections in x Direction;

FIG. 32 b is a Link Diagram for Rule R₂;

FIG. 33 a shows Rule R₃ for two Fully Overlapping Two-Dimensional Ranges(one being a Proper Sub-Range of the other);

FIG. 33 b is a Link Diagram for Rule R₃;

FIG. 34 a shows Rule R₄ for two Partially Overlapping Two-DimensionalRanges

FIG. 34 b is a Link Diagram for Rule R₄;

FIG. 35 a shows Rule R₅ for two Partially Overlapping Two-DimensionalRanges, and

FIG. 35 b is a Link Diagram for Rule R₅;

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention is a method of, and device performing operationson multi-dimensional entries having associated data or actions, inresponse to a multi-dimensional input key, using associative searchengines. A novel concept, Multi-Dimensional Ranges (MDRs), isintroduced, and the utility of such MDRs in compactly representingmulti-field information bases is shown. The present invention isparticularly suitable for packet classification in the communicationsfield.

The concept presented here provides the capability to decompose ad-Dimensional Range Information Base into d one-dimensional ranges, andeach d-Dimensional Key into d one-dimensional keys, and thus transformthe difficult search procedure in a d-Dimensional Information Base intod one-dimensional range searches, which can be readily performed by done-dimensional Range Search Engines (RSEs). This concept can be usedfor a d-Dimensional Information Base with single (or “binary”) integers,which can be viewed as a special case of a d-Dimensional RangeInformation Base.

The search algorithm presented involves the use of a Tag as a result (orassociated data) of each one-dimensional range search, and concatenatethis Tag with the next one-dimensional key searched in the nextdimension of the Range Information Base in the following step. Thissequence of d concatenated steps results in an Associated Data A (orAction A), which is associated with the d-dimensional range. The searchalgorithm steps can be pipelined to maximize the d-dimensional searchthroughput, regardless of the latency of the search procedure.

In the communications field, the throughput is expressed in terms of thenumber of packet classifications per second. A link diagram is providedas a technique to map classification rules into the Multi-DimensionalClassification System. The Classification System describes the entriesin each dimension as well as their linkage to the following dimension.The last stage specifies the action A to be performed on aMulti-Dimensional Key that matches the rule.

The concept of Multi-Dimensional Ranges is based on the concept ofone-dimensional ranges, as disclosed in my co-pending U.S. patentapplication, Ser. No. 09/779,941, which is incorporated by reference forall purposes as if fully set forth herein.

The multi-dimensional classification system can be implemented, forbinary integers, with a RAM-based Binary CAM device, as taught in myco-pending U.S. patent application, Ser. No. 10/229,054, which isincorporated by reference for all purposes as if fully set forth herein.For range entries, the multi-dimensional classification system can beimplemented with the RAM-Based RCAM, disclosed in my co-pending U.S.patent application, Ser. No. 10/229,065, which is incorporated byreference for all purposes as if fully set forth herein.

Other, improved RCAM implementations can be used. The first, a multiplemodule RCAM, is disclosed in my co-pending U.S. patent application, Ser.No. 10/040,389, and is hereby incorporated by reference for allpurposes, as if fully set forth herein. The multiple module RCAM allowsinterconnection of multiple RAM-based RCAM modules into a singlemultiple-module device.

Another improved RCAM implementation, called multi-RAM RCAM, includes agroup of RAMs in a single device, as taught in my co-pending U.S. patentapplication, Ser. No. 10/206,189, which is incorporated by reference forall purposes as if fully set forth herein. Several Multi-RAM RCAMdevices can be integrated in multiple modules to form multiple-modulesof multi-RAMs.

The principles and operation of the multi-dimensional associative searchengines of the present invention may be better understood with referenceto the drawings and the accompanying description.

Before explaining at least one embodiment of the invention in detail, itis to be understood that the invention is not limited in its applicationto the details of construction and the arrangement of the components setforth in the following description or illustrated in the drawing. Theinvention is capable of other embodiments or of being practiced orcarried out in various ways. Also, it is to be understood that thephraseology and terminology employed herein is for the purpose ofdescription and should not be regarded as limiting.

1. Range Principles

1.1 Range Definition

A Range R is defined as a set of all the integers K that comply with thecondition N_(L)≦K<N_(H), where N_(L) and N_(H) are two integers suchthat 0≦N_(L)<N_(H). This condition is denoted byR≡[N_(L),N_(H))where N_(L) and N_(H) are defined as the Lower and Upper RangeBoundaries, respectively.

The Range definition implies that the Range Lower Boundary N_(L) belongsto the Range, whereas the Range Upper Boundary N_(H) does not belong tothe Range. The Range Lower Boundary is a Closed Boundary in mathematicalterms, whereas the Range Upper Boundary is an Open Boundary. Thus, theRange as defined is a Semi-Closed/Semi-Open interval of integers.

The Range as defined above provides a very efficient representation foraddress ranges in Classless Inter Domain Routing (CIDR) used in InternetProtocol Version 4 (IPv4), the currently used IP version.

Definitions, basic properties and operations of ranges, RCAMimplementations, and applications of the RCAM for Classless Inter DomainRouting (CIDR) have been developed in my above-referenced, co-pendingU.S. patent applications (Ser. Nos. 09/779,941 and 10/229,065).

1.2 Range-Associated Data and Match Value

The most common operation performed upon ranges is a search andidentification of the range that contains a submitted key K (aninteger), and, as a result, retrieval of associated data (anotherinteger) that corresponds uniquely to the identified range.

Two ranges are called Overlapping Ranges if there is any integer K thatis included in both ranges. In general, a Key Search over a set ofoverlapping ranges may yield inconsistent results, as the key may befound in several of these ranges, each one having its own uniqueassociated data. To obtain associated data from overlapping ranges, eachrange is assigned a Priority. Then, if the Key Search results in severalmatches, the associated data of the highest-priority matching range isselected.

The submitted integer K is searched in the set

of overlapping ranges and, if found, a single integer d≧0 is retrievedfrom the corresponding set D of Associated Data; this integer is calledAssociated Data. Besides, a Boolean variable m, called Match value,assumes the value“1”, indicating a Match. If i is the highest-priorityindex (or lowest index value) of all the matching ranges in

, then d=d_(i) and m_(i)=“1”. If the submitted integer K is not found in

, the Match value assumes the value “0”, indicating that there isNo-Match. Then, the value of d has no meaning, indicated by d=x, where xrepresents a Don't Care.

This process of Associated Data retrieval, in which the submitted Key isfirst searched in all the ranges, is called Post-Processing. It allows asimple but inefficient implementation in hardware, and results in highpower consumption and search performance that varies with the number ofpriority rules.

1.3 Equivalent Non-Overlapping Range Set and Related Range Operations

An alternative and more efficient method to search for the submitted keyK and retrieve the associated data, called Pre-Processing, is based onthe combination of the overlapping ranges and their conversion toequivalent non-overlapping ranges prior to the search. In this method,the original overlapping range set

is transformed into an Equivalent Non-Overlapping Range Set that yieldsconsistently the same associated data from an Associated Data Setcorresponding to the Equivalent Non-Overlapping Range Set.

In a Non-Overlapping Range Set, an integer K cannot belongsimultaneously to two different ranges. This makes the notion of rangepriority indispensable.

A Non-Overlapping Range Set and an Overlapping Range Set are equivalentif and only if for every integer K the two yield the same results, i.e.,the same Match values and Associated Data.

The combination of two overlapping ranges is defined in terms of the twooverlapping ranges R_(a)/d_(a), that represents a range R_(a)=[N_(L)^(a),N_(H) ^(a)) with an Associated Data d_(a), and R_(b)/d_(b), thatrepresents a range R_(b)=[N_(L) ^(b),N_(H) ^(b)) with an Associated Datad_(b), where a<b; that is, R_(a) has a higher priority than R_(b).

The overlapping R_(a) and R_(b) lead to several possible combinations.The combination results are illustrated in FIG. 1 and summarized inTable 1. In each of these combinations, R_(a) has a higher priority thanR_(b) and the result always contains the original R_(a); however, R_(b)is always replaced by newly created ranges or is completely eliminated.

The U sign designates the operation that combines the two ranges. RangeAlgebra is distinct in the sense that the U operand result depends notonly on value of the basic elements but also on their boundary values.The basic principles of the Range U operation are covered in myabove-referenced co-pending applications.

TABLE 1 Combination of Two Overlapping Ranges and the ResultingEquivalent Non-Overlapping Ranges Topological Relation Between R_(a) andR_(b) Result: N_(L) ^(a) N_(H) ^(a) R_(a) U R_(b) Comment N_(L) ^(a) ∈R_(b) N_(H) ^(a) ∈ R_(b) [N_(L) ^(b),N_(L)^(a))/d_(b),R_(a)/d_(a),[N_(H) ^(a),N_(H) ^(b))/d_(b) R_(a) is includedin R_(b) N_(L) ^(a) ∉ R_(b) N_(H) ^(a) ∈ R_(b) R_(a)/d_(a),[N_(H)^(a),N_(H) ^(b))/d_(b) N_(L) ^(a) ∈ R_(b) N_(H) ^(a) ∉ R_(b) [N_(L)^(b),N_(L) ^(a))/d_(b),R_(a)/d_(a) N_(L) ^(a) ∉ R_(b) N_(H) ^(a) ∉ R_(b)R_(a)/d_(a) R_(b) is included in R_(a)

In general, there are five possible different results when two rangesare combined using the U operator. FIG. 1 illustrates graphically theseresults in five separate drawings, FIG. 1(a) through FIG. 1(e). Theoriginal Ranges R_(a) and R_(b) are depicted at the left side of eachdrawing. The U operation result is depicted at the right side of eachdrawing. In all the cases, R_(a) assumes a higher priority than R_(b),that is, a<b.

FIG. 1(a) corresponds to the simple case of non-overlapping ranges,which remain unchanged; this case is not listed in Table 1. FIG. 1(b)through FIG. 1(e) correspond to the four cases presented in the table.In FIG. 1(a), R_(a) and R_(b) remain unchanged after the U operation. InFIG. 1(e), R_(a) remains unchanged whereas R_(b) is eliminated. In FIG.1(b) through FIG. 1(d), R_(a) remains unchanged, R_(b) disappears, andone or two ranges are created.

Two Non-overlapping Ranges R_(i) and R_(i+1) are called Adjacent Ranges,if they share one boundary, that is N_(H) ^(i)=N_(L) ^(i+1). Accordingto this definition, [N_(L) ^(b),N_(L) ^(a)) and R_(a) in FIG. 1(b) areAdjacent Ranges as they share N_(L) ^(a), which is the open boundary of[N_(L) ^(b),N_(L) ^(a)) and the closed boundary of R_(a), twonon-overlapping ranges. Similarly, R_(a) and [N_(H) ^(a),N_(H) ^(b)) inthe same figure are Adjacent Ranges, sharing N_(H) ^(a), which is theopen boundary of R_(a) and the closed boundary of [N_(H) ^(a),N_(H)^(b)).

Adjacent Ranges enable a compact way of representing ranges, whichresults in a significant saving in storage space. The shared boundariesof the Adjacent Ranges in FIG. 1(b) are marked twice, once as the openboundary of a left-hand range, and once as a closed boundary for theright-hand range.

An Adjacent Range Set,

^(A) ≡{[N ₁ ,N ₂),[N ₂ ,N ₃), . . . ,[N _(i−1) ,N _(i)),[N _(i) ,N_(i+1)), . . . ,[N _(q−1) ,N _(q)),[N _(q) ,N _(q+1))}and its Associated Data Set,D ^(A) ={d ₁ ,d ₂ , . . . ,d _(i−1) ,d _(i) , . . . ,d _(q−1) ,d _(q)},can be represented by the boundary integer set

^(A) =[N ₁ ,N ₂ ,N ₃ , . . . N _(i−1) ,N _(i) ,N _(i+1) , . . . ,N_(q−1) ,N _(q) ,N _(q+1)),where N₁ is the closed boundary of the leftmost Adjacent Range, N₂,N₃, .. . ,N_(i−1),N_(i), , . . . N_(q−1),N_(q) are the shared boundaries ofthe Adjacent Ranges, and N_(q+1) is the open boundary of the rightmostAdjacent Range.

This definition implies that N₁<N₂<N₃< . . . <N_(i−1)<N_(i)< . . .<N_(q−2)<N_(q−1)<N_(q)<N_(q+1).

Searching in

^(A) for a Range R_(i) which contains the integer K, and retrieving theAssociated Data d_(i), implies finding i such that N_(i)≦K<N_(i+1).

The above definition yields a compact Adjacent Range representation,because each shared boundary is presented only once, instead of twice inthe Adjacent Range notation used above. For instance, the followingnotations are equivalent in the case shown in FIG. 1(b):{[N _(L) ^(b) ,N _(L) ^(a)),R _(a) ,[N _(H) ^(a) ,N _(H) ^(b))}≡[N _(L)^(b) ,N _(L) ^(a) ,N _(H) ^(a) ,N _(H) ^(b))

FIG. 1 and Table 1 show that if R_(a) and R_(b) are two OverlappingRanges, then

^(A)=R_(a) U R_(b) is an Adjacent Range Set, whose compactrepresentation is [N₁ ^(A), . . . , N_(n) ^(A)), where 2≦n≦4.

Using the U operator repeated times upon an Overlapping Range Set

and its Associated Data Set D, and applying the Commutative andAssociative Laws for this operator until all the resulting ranges becomenon-overlapping, yield an Equivalent Non-overlapping Range Set with anAssociated Data Set.

In general, the number of boundaries in the Equivalent Non-OverlappingRange is significantly less than the sum of all the boundaries of theoverlapping ranges. Some of these boundaries may coincide with one ormore of the overlapping range boundaries.

FIG. 2 illustrates how a Key Search is performed over an EquivalentNon-overlapping Range Set and the Associated Data thereof.

Three different cases of searches are presented:

-   Case 1: Search is performed where the key K falls into an interval    Γ_(t−1)≦K<Γ_(t). Since Γ_(t−1) is a Closed Boundary, then [Γ_(t−1),    Γ_(t)) is a Range. The result of this search is m=“1” (Match), and    d=δ_(t−1). It should be noted that since Γ_(t) is a Closed Boundary,    the interval at the right of Γ_(t) is also a Range.-   Case 2: Search is performed where the key K falls into an interval    Γ_(p+1)≦K<Γ_(p+2). Since Γ_(p+1) is an Open Boundary, then the    interval)Γ_(p+1), Γ_(p+2)[is not a Range. The result of this search    is m=“0” (No-Match) and d=x, where x means Don't Care.-   Case 3: Search is performed where the key K falls into an interval    Γ_(q)≦K<Γ_(q+1). Since Γ_(q) is a Closed Boundary, then [Γ_(q),    Γ_(q+1)) is a Range. The result of this search is m=“1” (Match), and    d=δ_(q). Since Γ_(q+1) is an Open Boundary, the interval at the    right of Γ_(q+1) is not a Range.

It may be concluded from the three cases presented above that the typeof interval that contains the key K is a Range is solely determined bythe interval left boundary. If this is a Closed Boundary, then theinterval is a Range, there is a Match (m_(interval)=“1”) and there is ameaningful Associated Data d_(interval) corresponding to this Range. If,however, the interval left boundary is an Open Boundary, then theinterval is not a Range, and there is No-Match (m_(interval)=“0”) theAssociated Data has no meaning.

Since the notion of the leftmost boundary of an interval that containsthe key is used to determine whether the interval is a Range, a specialcare must be taken of the interval between 0 and Γ₁ (left boundary ofthe leftmost Range). If Γ₁>0, then the integer 0 must be denoted as anOpen Boundary. This ensures that searching for a key in the interval)0,Γ₁[will yield No-Match.

1.4 Use of Non-Overlapping Ranges for Storing IPv4 CIDR Addresses

An IPv4 CIDR Address (which actually defines a range of addresses)consists of 32 bits. These 32-bit values are typically represented asfour decimal values separated by dots, each representing an 8-bit binarynumber. The IPv4 CIDR address range is represented as:A/pwhere A is the IPv4 address and p is the prefix (0≦p≦32).

The prefix is the number of contiguously compared most significant bitsfrom left to right. The prefix is equivalent to a 32-bit mask consistingof p 1's followed by (32−p) 0's; each bit 0 in the mask of the CIDRaddress must be ignored when the address value is compared with asubmitted address.

The IPv4 CIDR address range can be represented as a range using thefollowing formula:A/p≡[A,A+2^(32−p))Comparing this formula with the range definition given aboveR≡[N_(L),N_(H)), it is clear that the IPv4 CIDR address range parametersA and p are related to the range lower (closed) boundary N_(L) and upper(open) boundary N_(H) by simple formulae:N_(L)=AN _(H) =A+2^(32−p)p=32−log₂(N _(H) −N _(L))

EXAMPLE 1

The IPv4 CIDR address range 198.32.0.0/13 (in prefix representation) isalternatively represented by its IP Address and Mask as follows:

-   IP Address: 11000110 00100000 00000000 00000000-   Mask: 11111111 11111000 00000000 00000000    This IP Address Range extends:-   From: 11000110 00100000 00000000 00000000=198.32.0.0-   To: 11000110 00100111 11111111 11111111=198.39.255.255

By sharp contrast, the inventive Range Representation, compactlyspecifies the IP

Address Range as follows:

-   [11000110 00100000 00000000 00000000, 11000110 00101000 00000000    00000000)=[198.32.0.0, 198.40.0.0)

IPv4 CIDR address ranges are characterized in that smaller ranges havehigher priority and are thus contained in larger ranges; i.e., ifR_(a)≡A_(a)/p_(a) and R_(b)≡A_(b)/p_(b) are two IPv4 CIDR overlappingaddress ranges, where p_(a)>p_(b) (a<b), thenR_(a)≡A_(a)/p_(a)⊂R_(b)≡A_(b)/p_(b), as shown in FIG. 1(b). IPv4 CIDRaddress ranges can also be non-overlapping, as in FIG. 1(a), but cannotbe partially overlapping as in FIG. 1(c) or FIG. 1(d). The case shown inFIG. 1(e), where the larger range R_(b) has higher priority than R_(a),is not possible either.

If R_(a) ⊂R_(b), as shown in FIG. 1(b), then R_(a) is left unchangedafter the R_(aU R) _(b) operation, and the ranges [N_(L) ^(a),N_(L)^(b))/d_(b) and [N_(H) ^(a),N_(H) ^(b))/d_(b) are created; both rangeshave the priority of R_(b), which is lower than that of R_(a).

The IPv4 CIDR address ranges are pre-processed using the U operatoruntil yielding equivalent non-overlapping ranges for storage assequential keys in the Key TDA of a RAM-Based RCAM. When a new IPv4 CIDRaddress range is inserted, it is processed with the already storednon-overlapping ranges within its boundaries only, because larger rangesoutside them have lower priority and are not affected. Similarly, whenan enlisted address range is removed, the remaining ranges within itsboundaries are processed before their storage.

IPv4 CIDR addresses can always be represented by ranges, but not all theranges can have equivalent CIDR addresses. However, CIDR addresses canbe aggregated to form any range. The inventive Range Representationallows aggregation of contiguous CIDR address ranges into a single rangedefined by just two numbers, i.e., the lower and upper boundaries of therange.

FIG. 3 shows an example of the aggregation of three contiguous CIDRaddress ranges leading to a single range defined by these twoboundaries, in contrast to the conventional prefix notation requiringthree pairs of numbers.

Another simple example of the advantage of the inventive RangeRepresentation over the prefix notation is the specification of the CIDRaddress ranges containing all the client TCP ports greater than 1023.

The inventive Range Representation requires only one range specified bythe lower and upper boundaries thereof, i.e., [00000100 00000000,00000000 00000000).

The conventional prefix notation, on the other hand, requires six pairsof numbers:

SPN₁: 00000100 00000000 SPN₄: 00100000 00000000 Mask₁: 11111100 00000000Mask₄: 11100000 00000000 SPN₂: 00001000 00000000 SPN₅: 01000000 00000000Mask₂: 11111000 00000000 Mask₅: 11000000 00000000 SPN₃: 0001000000000000 SPN₆: 10000000 00000000 Mask₃: 11110000 00000000 Mask₆:10000000 00000000 where SPN stands for Source Port Number2. Multi-Dimensional Ranges—Basic Principles2.1 Definitions

-   Definition: Ω^(d) is a d-Dimensional Space if it contains all the    d-dimensional points P≡(x₀*, x₁*, . . . x_(d-1)*), where x_(i)* is    an integer coordinate in the X_(i) dimension, and i is an integer    0≦i<d.-   Definition: Let Ω^(d) be a d-dimensional space with X₀,X₁, . . .    ,X_(d-1) dimension coordinates.    ^(d)≡    ₀ ¹X    ₁ ¹X . . . X    _(d-1) ¹, a d-Dimensional Range in Ω^(d), is a set of all    d-dimensional integer points P≡(x₀*, x₁*, . . . x_(d-1)*) such that    x_(i)* ∈    _(i) ¹ for 0≦i<d, where    _(i) ¹ is a one-dimensional range in the i-th dimension;    _(i) ¹≡[x_(L) ^(i),x_(H) ^(i)), where x_(L) ^(i) is the lower closed    boundary and x_(H) ^(i) is the upper open boundary of    _(i) ¹, i.e., x_(L) ^(i)≦x_(i)*<x_(H) ^(i).

FIG. 4 depicts a two-dimensional range representation,

², which conforms to this definition. A two-dimensional range

² is represented by a rectangle in a two-dimensional space Ω². Thisrectangle contains all the two-dimensional integer points P≡(x*,y*) suchthat x*∈[x_(L), x_(H)) and y*∈[y_(L),y_(H)), where [x_(L),x_(H)) and[y_(L),y_(H)) are one-dimensional ranges in the x and y dimensions,respectively.

FIG. 5 shows an example of a three-dimensional range. Athree-dimensional range

³ can be geometrically represented by a rectangular parallelepiped.Similarly, a d-dimensional range can be considered as a d-dimensionalrectangular parallelepiped.

-   Definition: Φ^(d) is an Empty d-Dimensional Range, if a    d-dimensional point P≡(x₀*, x₁*, . . . x_(d-1)*), P∈Ω^(d), and    P∉Φ^(d).-   Theorem: The Φ^(d) projection in each dimension is a one-dimensional    range Φ_(i) ¹, 0≦i<d.-   Definition:    ₁ ^(d) is a Sub-Range of    ₂ ^(d) if for every P≡(x₀*,x₁*, . . . x_(d-1)*), such that P∈    ₁ ^(d)→P∈    ₂ ^(d).-   Definition:    ₁ ^(d) is a Proper Sub-Range of    ₂ ^(d) if    ₁ ^(d) is a Sub-Range of    ₂ ^(d) and there is P₂≡(x₀*,x₁*, . . . x_(d-1)*), such that P₂∈    ₂ ^(d) and P₂∉    ₁ ^(d).

FIG. 6 depicts a Proper Two-Dimensional Sub-Range of a Two-DimensionalRange.

-   Definition: Multi-dimensional Ranges    ₁ ^(d)    ₂ ^(d) are Overlapping if there is a d-dimensional point P≡(x₀*,x₁*,    . . . x_(d-1)*) such that P∈    ₁ ^(d) and P∈    ₂ ^(d).-   Theorem:    ₁ ^(d) and    ₂ ^(d) are Overlapping Multi-Dimensional Ranges,    _(i1) ¹≡[x_(L1) ^(i),x_(H1) ^(i)) is the    ₁ ^(d) range projection on the i-th dimension axis, and    _(i2) ¹≡[x_(L2) ^(i),x_(H2) ^(i)) is the    ₂ ^(d)range projection on the i-th dimension axis, for 0≦i<d. Then,    _(i1) ¹ and    _(i2) ¹ are Overlapping Ranges for 0≦i<d .

FIG. 7 demonstrates two-dimensional Overlapping Ranges. For thetwo-dimensional overlapping ranges

₁ ² and

₂ ², [x_(L1),x_(H1))and [x_(L2),x_(H2)), and also [y_(L1),y_(H1)) and[y_(L2),y_(H2)), are overlapping.

-   Definition: Multi-dimensional Ranges    ₁ ^(d) and    ₂ ^(d) are Disjoint (or Non-Overlapping) if for any d-dimensional    point P≡(x₀*,x₁*, . . . x_(d-1)*), P∈    ₁ ^(d)→P∈    ₂ ^(d) and P∈    ₂ ^(d)→P∉    ₁ ^(d).-   Theorem:    ₁ ^(d), and    ₂ ^(d) are Disjoint Multi-Dimensional Ranges, if there exists an    i-th dimension 0≦i<d for which the one-dimensional range projections    _(i1) ¹≡[x_(L1) ^(i),x_(H1) ^(i)) and    _(i2) ¹≡[x_(L2) ^(i),x_(H2) ^(i)) are Disjoint.

FIG. 8 demonstrates two-dimensional Disjoint Ranges. The ranges aredisjoint because their projected ranges on the x-axis, [x_(L1),x_(H1))and [x_(L2),x_(H2)), are disjoint. Similarly, if the projectedone-dimensional ranges on the y-axis are disjoint, then also thetwo-dimensional ranges are disjoint.

-   Definition: The Inverse of a Range    ^(d)≡[x_(L) ⁰,x_(H) ⁰)X[x_(L) ¹,x_(H) ¹)X . . . X[x_(L) ^(d-1),x_(H)    ^(d-1)) is a range    $\overset{\_}{\Re^{d}} \equiv \overset{\_}{\left\lbrack {x_{L}^{0},x_{H}^{0}} \right){X\left\lbrack {x_{L}^{1},x_{H}^{1}} \right)}X\quad\ldots\quad{X\left\lbrack {x_{L}^{d - 1},x_{H}^{d - 1}} \right)}}$    defined as a set of all points P≡(x₀*, x₁*, . . . x_(d-1)*), such    that if P∈{overscore (    ^(d))}→P∉    ^(d).-   Theorem: Let    ^(d)≡[x_(L) ⁰,x_(H) ⁰)X[x_(L) ¹,x_(H) ¹)X . . . X[x_(L) ^(d-1),x_(H)    ^(d-1)) be a d-dimensional range. Then, {overscore (    ^(d))}≡{[0,x_(L) ⁰)+[x_(H) ⁰,0)}+{[0,x_(L) ¹)+[x_(H) ¹,0)}+ . . .    +{[0,x_(L) ^(d-1))+[x_(H) ^(d-1),0)}.

FIG. 9 depicts a two-dimensional Inverse of the range

²≡[x_(L),x_(H))X[y_(L),y_(H))Note: Zero used as the range upper limit implies that this range extendsindefinitely. In a set of k-bit numbers, the largest number has k ‘1’s.The next larger number is ‘1’ in the (k+1)th-bit position followed by k‘0’s. So, if this bit ‘1’ is omitted, then the string of k ‘0’s can beused as a number larger than all k-bit numbers. Since this zero alwaysfollows the largest number in the set, it can be clearly distinguishedfrom the string of k ‘0’s (true zero) used as the range lower limit.2.2 Multi-Dimensional Ranges—Basic Laws

Since Multi-Dimensional Ranges are groups, all the logic relations thatapply to groups also apply to ranges.

In the relations brought hereinbelow,

-   -   + is an “OR” operator between two d-dimensional ranges.    -   • is an “AND” operator between two d-dimensional ranges.

-   Definition: If P∈    ₁ ^(d)+    ₂ ^(d)→(P∈    ₁ ^(d))OR(P∈    ₂ ^(d))

-   Definition: If P∈    ₁ ^(d)•    ₂ ^(d)→(P∈    ₁ ^(d))AND(P∈    ₂ ^(d))

-   Identity Laws:

-   ^(d)+Φ^(d)≡    _(d)

-   ^(d)•Ω^(d)≡    ^(d)

-   Commutative Laws:

-   ₁ ^(d)+    ₂ ^(d)≡    ₂ ^(d)+    ₁ ^(d)

-   ₁ ^(d)•    ₂ ^(d)≡    ₂ ^(d)•    ₁ ^(d)

-   Complementation Law:

-   {double overscore (    ^(d))}≡    ^(d)

-   Associative Laws:

-   ₁ ^(d)+(    ₂ ^(d)+    ₃ ^(d))≡(    ₁ ^(d)+    ₂ ^(d))+    ₃ ^(d)

-   ₁ ^(d)•(    ₂ ^(d)•    ₃ ^(d))≡(    ₁ ^(d)•    ₂ ^(d))•    ₃ ^(d)

-   Distributive Laws:

-   ₁ ^(d)•(    ₂ ^(d)+    ₃ ^(d))≡    ₁ ^(d)•    ₂ ^(d)+    ₁ ^(d)•    ₃ ^(d)

-   ₁ ^(d)+(    ₂ ^(d)•    ₃ ^(d))≡(    ₁ ^(d)+    ₂ ^(d))•(    ₁ ^(d)+    ₃ ^(d))

-   De Morgan Laws:

-   {overscore (    ₁ ^(d)+    ₂ ^(d))}≡{overscore (    ₁ ^(d))}•{overscore (    ₂ ^(d))}

-   {overscore (    ₁ ^(d)•    ₂ ^(d))}≡{overscore (    ₁ ^(d))}+{overscore (    ₂ ^(d))}    2.3 Multi-Dimensional Range-Specific Laws

Operations can be performed on Multi-Dimensional Ranges by performingoperations in one dimension, followed by operations in anotherdimension, and so on.

-   Identity Laws:-   [x_(L),x_(H))X([y_(L),y_(H))+Φ_(y) ²)≡[x_(L),x_(H))X[y_(L),y_(H))-   ([x_(L),x_(H))+Φ_(x) ²)X[y_(L),y_(H))≡[x_(L),x_(H))X[y_(L),y_(H))-   [x_(L),x_(H))X([y_(L),y_(H))•Ω_(y) ²)≡[x_(L), x_(H))X[y_(L),y_(H))-   ([x_(L),x_(H))•Ω_(x) ²)X[y_(L),y_(H))≡[x_(L),x_(H))X[y_(L),y_(H))    Φ_(x) ² and Φ_(y) ² are empty one-dimensional ranges in the x and y    directions, respectively.    Ω_(x) ² and Ω_(y) ² are the entire one-dimensional range spaces in    the x and y directions, respectively.-   Complementation Law:-   {double overscore    ([x_(L),x_(H))X[y_(L),y_(H)))}≡[x_(L),x_(H))X[y_(L),y_(H))-   Commutative Law:-   [x_(L),x_(H))X[y_(L),y_(H))≡[y_(L),y_(H))X[x_(L),x_(H))-   Associative Law:-   [x_(L),    x_(H))X{[y_(L),y_(H))X[z_(L),z_(H))}≡{[x_(L),x_(H))X[y_(L),y_(H))}X[z_(L),z_(H))-   Distributive Laws:-   [x_(L),x_(H))X{[y_(L1),y_(H1))+[y_(L2),y_(H2)))}≡[x_(L),x_(H))X[y_(L1),y_(H1))+[x_(L),x_(H))X[y_(L2),y_(H2))-   {[x_(L1),x_(H1))+[x_(L2),x_(H2))}X[y_(L),y_(H))≡[x_(L1),x_(H1))X[y_(L),y_(H))+[x_(L2),x_(H2))X[y_(L),y_(H))

The meaning of the two distributive laws is graphically depicted inFIGS. 10 and 11.

-   “De Morgan” Laws:

The laws formulated hereinbelow are similar to the De Morgan laws,applied to two-dimensional ranges.

-   {overscore ([x_(L),x_(H))X[y_(L),x_(H)))}≡{overscore    ([x_(L),x_(H)))}+{overscore ([y_(L),y_(H)))}-   {overscore ([x_(L),x_(H))+[y_(L),y_(H))}≡{overscore    ([x_(L),x_(H)))}X{overscore ([y_(L),y_(H)))}    FIG. 12 and FIG. 13 demonstrate the two De Morgan-type laws for    two-dimensional ranges.    2.4 Multi-Dimensional Ranges, Associated Actions and Priorities-   Definition:-   Let K^(d) be a d-dimensional value K^(d)≡(k₀,k₁, . . . k_(d-1))    defined as a Key.-   Let {    ₀ ^(d),    ₁ ^(d), . . .    _(n−2) ^(d),    _(n−1) ^(d)} be a set of n disjoint ranges.-   Let {A₀A₁, . . . A_(n−2),A_(n−1)} be a set of actions associated    with the set of the disjoint ranges, that is, A_(i) is associated    with    _(i) ^(d) for 0≦i<n.-   Let {m₀,m₁, . . . m_(n−2),m_(n−1)} be a set of the respective    matching logic values of the disjoint ranges, such that, if K^(d)∈    _(j) ^(d)→m_(j)≡‘1’, otherwise m_(i)≡‘0’ for 0≦i<n and i≠J.    Then, (A, m)≡    ({    ₀ ^(d),    ₁ ^(d), . . .    _(n−1) ^(d)},K^(d)) is an associated action function, such that    A≡A_(j) and m≡‘1’ if m_(j)≡‘1’. If m_(i)≡‘0’ for any i, 0≦i<n, then    A is underlined and m≡‘0’.

From here and on, we shall apply the notation

_(i) ^(d)/A_(i) to denote an action A_(i) associated with thed-dimensional range

_(i) ^(d).

The definition provided hereinabove is valid for disjoint ranges.However, in the general case, the multi-dimensional ranges may beoverlapping; that is, there exists P≡(x₀*,x₁*, . . . x_(d-1)), such thatP∈

_(i) ^(d)/A_(i) and P∈

_(j) ^(d)/A_(j), A_(i)≠A_(j), i≠j, 0≦i<n, 0≦j<n. Thus, there may beKeys, which when applied to the set of ranges {

₀ ^(d)/A₀,

₁ ^(d)/A₁, . . . ,

_(n−1) ^(d)/A_(n−1)} may yield two conflicting actions A_(i)≠A_(j).

The notion of priority resolves any conflicts.

-   Definition: Let    _(i) ^(d)/A_(i)/p_(i) be a range    _(i) ^(d), an action A_(i) and an integer p_(i), where p_(i)≧0 is    defined as the priority of the range    _(i) ^(d); p_(i)≠p_(j) for any two overlapping ranges    _(i) ^(d) and    _(j) ^(d).    _(i) ^(d) is defined as having higher priority than    _(j) ^(d) for p_(i)<p_(j).-   Note: The definition that    _(i) ^(d) is of higher priority than    _(j) ^(d) if p_(i)<p_(j) is arbitrary.    _(i) ^(d) can be defined as having lower priority than    _(j) ^(d) if p_(i)<p_(j).-   Definition:-   Let    ₁ ^(d)/A₁/p₁ be a range    ₁ ^(d), an action A₁ and an integer p₁,p₁≧0, and    ₂ ^(d)/A₂/p₂ be a range    ₂ ^(d), an action A₂ and an integer p₂,p₂≧0, such that p₁<p₂ for any    two overlapping ranges    ₁ ^(d) and    ₂ ^(d); p₁ and p₂ are defined as the respective priorities of the    d-dimensional ranges    ₁ ^(d) and    ₂ ^(d). If K^(d)∈    ₁ ^(d)/A₁/p₁, K^(d)∈    ₂ ^(d)/A₂/p₂, where p₁<p₂, and (A,‘1’)≡    ({    ₁ ^(d)/A₁/p₁,    ₂ ^(d)/A₂/p₂}), then A≡A₁ and m≡‘1’.

This definition resolves any conflict between overlapping d-dimensionalranges in the overlapping regions. This is demonstrated for the case ofoverlapping two-dimensional ranges in FIG. 14. As shown in FIG. 14,since

₁ ^(d) has higher priority than

₂ ^(d) (p₁<p₂), then the action taken on K^(d)∈

₁ ^(d) and K^(d)∈

₂ ^(d) is A₁.

A set of laws can be defined, accounting for overlapping ranges, actionsand priorities:

-   Identity Laws:-   [x_(L),x_(H))X([y_(L),y_(H))+Φhd    y²)/A/p≡[x_(L),x_(H))X[y_(L),y_(H))/A/p-   ([x_(L),x_(H))+Φ_(x)    ²)X[y_(L),y_(H))/A/p≡[x_(L),x_(H))X[y_(L),y_(H))/A/p-   [x_(L),x_(H))X([y_(L),y_(H))•Ω_(y)    ²)/A/p≡[x_(L),x_(H))X[y_(L),y_(H))/A/p-   ([x_(L),x_(H))•Ω_(x) ²)X[y_(L),y_(H))/A/p≡[x_(L),x_(H))X[y_(L),    y_(H))/A/p-   Complementation Law:-   {double overscore    ([x_(L),x_(H))X[y₁,y_(H)))}/A/p≡[x_(L),x_(H))X[y₁,y_(H))/A/p-   Commutative Law:-   [x_(L),x_(H))X[y_(L),y_(H))/A/p≡[y_(L),y_(H))X[x_(L),x_(H))/A/p-   Associative Law:-   [x_(L),x_(H))X{[y_(L),y_(H))/A/p)}≡{[x_(L),x_(H))/A/p}X[y_(L),y_(H))-   Distributive Laws:-   [x_(L),x_(H))X{[y_(L1),y_(H1))/A₁/p₁+[y_(L2),y_(H2))/A₂/p₂}≡[x_(L),x_(H))X[y_(L1),y_(H1))/A₁/p₁+[x_(L),x_(H))X[y_(L2),y_(H2))/A₂/p₂-   {[x_(L1),x_(H1))/A₁/p₁+[x_(L2),x_(H2))/A₂/p₂}X[y_(L),y_(H))≡[x_(L1),x_(H1))X[y_(L),y_(H))/A₁/p₁+[x_(L2),x_(H2))X[y_(L),y_(H))/A₂/p₂    The distributive laws are depicted in FIGS. 15 and 16 for the    two-dimensional overlapping range case.    “De Morgan” Laws:

The laws provided hereinbelow are similar to the De Morgan laws, appliedto two-dimensional ranges.

-   {overscore ([x_(L),x_(H))X[y_(L),y_(H)))}/A/p≡{overscore    ([x_(L),x_(H)))}/A/p+{overscore ([y_(L),y_(H)))}/A/p-   {overscore ([x_(L),x_(H))+[y_(L),y_(H)))}/A/p≡{overscore    ([x_(L),x_(H)))}X{overscore ([y_(L),y_(H)))}/A/p    FIG. 17 and FIG. 18 demonstrate the two “De Morgan” laws for    two-dimensional ranges, which can be also interpreted as overlapping    one-dimensional ranges.    3. Searching Multi-Dimensional Keys over Multi-Dimensional Ranges

Searching whether a Multi-Dimensional Key falls into a Multi-DimensionalRange, which results in an action associated with this range, is awell-know problem of database search. This problem is also known aspacket classification in the communications field.

Search Problem Definition: A d-Dimensional Key, K^(d), is submitted to ad-dimensional information base consisting of n overlapping d-dimensionalranges {

₀ ^(d)/A₀/p₀,

₁ ^(d)/A₁/p₁, . . . ,

_(n−1) ^(d)/A_(n−1)/p_(n−1)}. Find the highest-priority range

_(i) ^(d)/A_(i)/p_(i) that contains the Key and perform the associatedaction A_(i).

It is assumed that the data in the different dimensions are mutuallyindependent, such that all the dimensions are orthogonal.

The Key search over a set of n overlapping d-dimensional ranges {

₀ ^(d),

₁ ^(d), . . .

_(n−1) ^(d)} can be performed using Post-Processing or Pre-Processing.The Post-Processing method involves overlapping ranges; the submittedKey may be found in two or more overlapping ranges in each dimension;thus, priority rules are required for selecting a unique range.

The alternative, more efficient, Pre-Processing method presented belowapplies to a Key search over disjoint (non-overlapping) d-dimensionalranges only. In this method, the overlapping ranges are converted toequivalent disjoint ranges prior to the search; then, the submitted Keyare only found in one range. Pre-processing is based on theabove-described arithmetical laws for ranges.

After pre-processing, the n d-dimensional ranges of the information baseare designated by {

₀ ^(d)/A₀,

₁ ^(d)/A₁, . . . ,

_(n−1) ^(d)/A_(n−1)} and do not require priority specification. Thesearch problem then becomes finding the range

_(i) ^(d)/A_(i) that contains the d-Dimensional Key K^(d) and performingthe associated action A_(i).

Any of the above methods can be implemented with any type of dAssociative Search Engines (ASEs) with Key entries and Associated Dataentries. Each ASE accepts the corresponding field of the submitted Keyand retrieves in response an Associated Data (AD). The AD issued by eachASE can be processed by Control Logic and applied with the succeedingfield of the submitted Key to the next ASE. The AD issued by the lastASE defines the Classification Rules or actions to be performed on theselected packet. FIG. 19 a shows the first two ASEs. If a standard ASEis used for all stages, then a default AD is applied to the first ASEinput, which does not affect the Key search in all its Key entries.

FIG. 19 a depicts a possible implementation of this ASE includes KeyMemory, Associated Data Memory and a range selector; this selectorreceives the AD from the preceding ASE and provides corresponding outputsignals for selecting subsets or segments in the Key Memory entries tobe searched. If overlapping ranges are allowed, then, a priorityselector is also required for selecting a unique range.

The inventive classification procedure is implemented with Range SearchEngines (RSEs), each including a Key Memory, Associated Data Memory andConcatenation Logic (see FIG. 19 c). The AD issued by each RSE for eachfield (in each dimension) is concatenated with the component of thesubmitted Key for the next field. The Concatenation Logic alsosynchronizes the concatenation process for maximal throughput betweenstages.

3.1 Two-Dimensional Search

This section deals with the question of checking whether atwo-dimensional Key K²≡(k_(x),k_(y)) belongs to the two-dimensionalRange

²/A≡[x_(L),x_(H))X[y_(L),y_(H))/A, and if so, taking an action A. At themoment, we ignore the fact that the Key may belong to multiple ranges.

It will be shown hereinbelow that the method presented is general andallows dealing with a Key search in a d-dimensional range. The power ofthe concept presented above lies in the ability to decompose a difficultd-dimensional range search into one-dimensional range searches, whichcan be readily solved.

FIG. 20 depicts the method of a two-dimensional Key search in atwo-dimensional range. The two-dimensional range information base isdecomposed into two one-dimensional Range Search Engines (RSEs). Theleftmost information base incorporates the x-dimension ranges, whereasthe rightmost one consists of tagged y-ranges; each of the latter is aconcatenation of a tag and a y-dimension range.

The search algorithm proceeds as follows:

-   1. Search whether the Key component in the x dimension, k_(x),    belongs to a range.-   2. If a two-dimensional range that contains the two-dimensional Key    is not found, then issue a no-match signal m_(x)=‘0’.-   3. If such an x-range [x_(L),x_(H)) is found, then issue an    associated Tag accompanied by a match signal m_(x)=‘1’ and proceed    as follows:    -   a. Concatenate the Tag with the Key k_(y) component and use the        Tag|k_(y) as a Key to search the range entries of the form        [Tag|y_(L),Tag|y_(H)) in the y-dimension RSE placed second from        the left.    -   b. If a range [Tag|y_(L),Tag|y_(H)) is found, the second        one-dimensional RSE issues an Associated Data A (action), which        is associated with the range        ²/A≡[x_(L),x_(H))X[y_(L),y_(H))/A. The second RSE issues a        signal m_(y)=‘1’, which indicates a match in the first as well        as in the second RSE.    -   c. If, however, no range        ²/A≡[x_(L),x_(H))X[y_(L),y_(H))/A that contains the Key        Tag|k_(y) is found, then issue a no-match signal        m=m_(x)•m_(y)=‘0’.-   Comments:-   1. It is clear that    Tag|k_(y)∈[Tag|y_(L),Tag|y_(H))→k_(y)∈[y_(L),y_(H)).-   2. The performance of a search on the y dimension followed by a    search in the x dimension, by swapping the order of execution, then    properly concatenating the x-dimension and y-dimension RSEs, and    associating the Tag with the first RSE and the action with the    second RSE, should yield identical results.-   3. Since this algorithm, implemented in hardware, allows decomposing    the two-dimensional problem into two sequential one-dimensional    problems, which we know how to solve, we are now capable of solving    a d-dimensional Key search problem by iterative application of the    here above described algorithm.

EXAMPLE 2

Two-Dimensional Classification

This example can be seen as a Classification of two-field packets inorder to perform actions on the selected packet. These actions aredefined by the Classification Rules. The Classification procedure isexpressed as a two-dimensional Key search over a set of two-dimensionalranges, where the Associated Data of the two-dimensional range thatcontains the submitted Key specifies the associated action to beperformed on the selected packet.

Assume a search of a two-dimensional Key in a two-dimensionalinformation base consisting of 8 x-dimension ranges (a₀ to a₇) and 6y-dimension ranges (b₀ to b₅).

The less efficient Post-Processing method involves overlapping ranges inboth dimensions. When the submitted Key is found in two or moreoverlapping ranges, a unique range is selected in each dimension bypriority rules. First, the x-component of the submitted Key, designatedK_(x), is searched in all the x-dimension ranges. If K_(x) is found, forinstance, in the three x-dimension ranges a₀, a₂ and a₅, then a priorityrule is applied to determine a unique range, say a₂. This range isassigned a Tag T₂, which is concatenated with the y-component of thesubmitted Key, designated K_(y), and with all the y-dimension ranges.Then, the tagged K_(y), (T₂|K_(y)), is searched in the taggedy-dimension ranges (T₂|b₀) to (T₂|b₅). Similarly to the x-dimension, if(T₂|K_(y)) is found in more than one tagged y-dimension range, a uniquerange is determined by priority rule.

The efficient Pre-Processing method utilized by the instant invention isbased on the combination of the overlapping ranges and their conversionto equivalent disjoint ranges prior to the search. Consequently, eachsubmitted Key is found in only one range (at most). Assume thatpre-processing yields 8 disjoint x-dimension ranges (a₀ to a₇) and 6disjoint y-dimension ranges (b₀ to b₅), as above. First, the x-componentK_(x) of the submitted Key is searched in all the x-dimension ranges.Assume that K_(x) is found in a₂. This range is assigned a Tag T₂, whichis concatenated with the y-component K_(y) of the submitted Key and withall the y-dimension ranges for searching the tagged K_(y), (T₂|K_(y)),in the tagged y-dimension ranges (T₂|b₀) to (T₂|b₅). As in thex-dimension, only one tagged y-dimension range can contain the taggedy-dimension key (T₂|K_(y)). If, for instance, this range is (T₂|b₃),then the Classification Rule is expressed by the selectedtwo-dimensional range a₂×(T₂|b₃).

The above two-dimensional search using both processing methods for 8x-dimension ranges and 6 y-dimension ranges requires the storage of 8x-dimension ranges and 6 tagged y-dimension ranges for a single rule.Table 2a shows the required 6 tagged y-dimension ranges. A conventionalclassification method requires the storage of 8×6 ranges for one rule.Table 2b shows the required 48 ranges.

TABLE 2a Representation of the 6 Tagged y-Dimension Ranges Required fora Single Rule in a set of Two-Dimensional 8x6 Ranges Using the NovelClassification Method y x Dimension Dimension 0 1 2 3 4 5 6 7 8 0a₂x(T₂|b₀) 1 a₂x(T₂|b₁) 2 a₂x(T₂|b₂) 3 a₂x(T₂|b₃) 4 a₂x(T₂|b₄) 5a₂x(T₂|b₅) 6 a₂x(T₂|b₆)

TABLE 2b Representation of the 8x6 Ranges Required for a Single Rule ina set of Two-Dimensional 8x6 Ranges Using the ConventionalClassification Method y x Dimension Dimension 0 1 2 3 4 5 6 7 0 a₀xb₀a₁xb₀ a₂xb₀ a₃xb₀ a₄xb₀ a₅xb₀ a₅xb₀ a₇xb₀ 1 a₀xb₁ a₁xb₁ a₂xb₁ a₃xb₁a₄xb₁ a₅xb₁ a₅xb₁ a₇xb₁ 2 a₀xb₂ a₁xb₂ a₂xb₂ a₃xb₂ a₄xb₂ a₅xb₂ a₅xb₂a₇xb₂ 3 a₀xb₃ a₁xb₃ a₂xb₃ a₃xb₃ a₄xb₃ a₅xb₃ a₅xb₃ a₇xb₃ 4 a₀xb₄ a₁xb₄a₂xb₄ a₃xb₄ a₄xb₄ a₅xb₄ a₅xb₄ a₇xb₄ 5 a₀xb₅ a₁xb₅ a₂xb₅ a₃xb₅ a₄xb₅a₅xb₅ a₅xb₅ a₇xb₅ 6 a₀xb₆ a₁xb₆ a₀xb₆ a₃xb₆ a₄xb₆ a₅xb₆ a₅xb₆ a₇xb₆

Similarly, a two-dimensional search in a two-dimensional informationbase consisting of m x-dimension ranges and n y-dimension rangesrequires the storage of these m ranges and n tagged ranges for a singlerule. Table 3a shows the required n tagged y-dimension ranges when thesubmitted Key is found in the specific x-dimension range a_(I) andy-dimension range b_(J). A conventional classification method requires,on the other hand, the storage of m×n ranges for one rule, as shown inTable 3b. This comparison shows the clear superiority of the inventiveclassification method over the conventional method regarding thenarrowing of the search in the y dimension to a subset of ranges(instead of all the entries in the y dimension) and storage efficiency.This, combined with the advantages provided by the novel RangeRepresentation over the prefix notation in more compact storage andaggregation of CIDR address ranges, results in much smaller storagespace in the RSE in comparison with any TCAM.

TABLE 3a Representation of the n Tagged y-Dimension Ranges Required fora Single Rule in a set of Two-Dimensional mxn Ranges Using The NovelClassification Method y x Dimension Dimension 0 1 . . . I . . . m-2 m-10 . . . a_(I)x(T₁|b₀) . . . 1 . . . a_(I)x(T₁|b₁) . . . . . . . . . . .. . . . J . . . a_(I)x(T₁|b_(J)) . . . . . . . . . . . . . . . n-2 . . .a_(I)x(T₁|b_(n-2)) . . . n-1 . . . a_(I)x(T₁|b_(n-1)) . . .

TABLE 3b Representation of the mxn Ranges Required for a Single Rule ina set of Two-Dimensional mxn Ranges Using the ConventionalClassification Method y x Dimension Dimension 0 1 . . . I . . . m-2 m-10 a₀xb₀ a₁xb₀ . . . a_(I)xb₀ . . . a_(m-2)xb₀ a_(m-1)xb₀ 1 a₀xb₁ a₁xb₁ .. . a_(I)xb₁ . . . a_(m-2)xb₁ a_(m-1)xb₁ . . . . . . . . . . . . . . . .. . . . . . . . J a₀xb_(J) a₁xb_(J) . . . a_(I)xb_(J) . . .a_(m-2)xb_(J) a_(m-1)xb_(J) . . . . . . . . . . . . . . . . . . . . . .. . n-2 a₀xb_(n-2) a₁xb_(n-2) . . . a_(I)xb_(n-2) . . . a_(m-2)xb_(n-2)a_(m-1)xb_(n-2) n-1 a₀xb_(n-1) a₁xb_(n-1) . . . a_(I)xb_(n-1) . . .a_(m-2)xb_(n-1) a_(m-1)xb_(n-1)3.2 d-Dimensional Search

FIG. 21 demonstrates the generalized solution for the d-dimensionalsearch problem. This solution is scalable, because it allows any numberof dimensions. It can be implemented by generalizing the two-dimensionalsearch algorithm described above to d dimensions.

Similarly to the two-dimensional case, the search on fields can beperformed in any order of the multiple dimensions in the d-dimensionalcase, as implied by applying the Associative Law described in greaterdetail hereinbelow.

The solution for the d-dimensional search problem can be efficientlyused in the communications field to classify packets based upon anynumber of packet header fields in a switch/router. In this application,the term “Classification” is used to express a multi-field (ormulti-dimensional) Key search over a multi-field range set, and the term“Classification System” for the multi-field system that stores themulti-field ranges over which classification is performed. The term“Classification Rule” expresses the multi-field ranges that contain thesearched multi-field Key and specifies the associated actions to beperformed.

EXAMPLE 3

Dimensional Classification

This example deals with the Classification of d-field packets. Forsimplicity, assume n d-field ranges having a single field in all thefirst d-1 dimensions (numbered from 0 to d-2), each field containing thecorresponding component of the submitted d-field Key, and that these d-1fields are identical in all the dimensions; the last dimension (numberedd-1) includes n different fields. The identical d-1 fields arerepresented by a, b, c, . . . , p, q. The different fields of the nranges in the last dimension (d-1) are represented by r₀, r₁, r₂, . . ., r_(n-2), r_(n-1). These n ranges define n Classification Rules R₀ toR_(n-1) that specify n actions A₀ to A_(n-1).

The Classification procedure is expressed as a d-dimensional Key searchover the set of d-dimensional ranges. First, the 0^(th)-dimensioncomponent of the submitted Key, designated K₀, is searched in the0^(th)-dimension field of the stored ranges, yielding a. This field isassigned a Tag T₀, which is concatenated with the 1^(st)-dimensioncomponent K₁ of the submitted Key, and with the 1^(st)-dimension fieldb. Then, the tagged K₁ (T₀|K₁) is searched and found in the tagged b(T₀|b). This field is assigned a Tag T₁, which is concatenated with the2^(nd)-dimension component K₂ of the submitted Key, and with theidentical 2^(nd)-dimension field c, for searching and so on, until the(d-2)^(th) dimension, where (T_(d-3)|K_(d-2)) is searched and found in(T_(d-3)|q) and is assigned a Tag T_(d-2). The (d-1)^(th) dimension hasn fields r₀ to r_(n-1). The tagged K_(d-1) (T_(d-2)|K_(d-1)) is searchedand found in the n tagged fields (T_(d-2)|r₀) to (T_(d-2)|r_(n−1))yielding n Classification Rules R₀ to R_(n−1) that specify n actions A₀to A_(n−1).

Table 4a shows that Classification of n d-field packets with fieldsvarying in a single dimension requires (d+n−1) tagged fields. Aconventional classification method requires, on the other hand, d×nfields, as shown in Table 4b. This comparison shows again the clearsuperiority of the novel classification method over the conventionalmethod with regard to storage efficiency.

TABLE 4a Representation of the Tagged d-Field Ranges Required for FieldsVarying in a Single Dimension Using The Novel Classification MethodField Rule 0 1 2 . . . d-3 d-2 d-1 Action R₀ a T₀|b T₁|c . . . T_(d-4)|pT_(d-3)|q T_(d-2)|r₀ A₀ R₁ T_(d-2)|r₁ A₁ R₂ T_(d-2)|r₂ A₂ . . . . . . .. . R_(n-3) T_(d-2)|r_(n-3) A_(n-3) R_(n-2) T_(d-2)|r_(n-2) A_(n-2)R_(n-1) T_(d-2)|r_(n-1) A_(n-1)

TABLE 4b Representation of the dxn d-Field Ranges Required for FieldsVarying in a Single Dimension Using the Conventional ClassificationMethod Field Rule 0 1 2 . . . d-3 d-2 d-1 Action R₀ a b c . . . p q r₀A₀ R₁ a b c . . . p q r₁ A₁ R₂ a b c . . . p q r₂ A₂ . . . . . . . . . .. . . . . . . . . . . . . . . . . R_(n-3) a b c . . . p q r_(n-3)A_(n-3) R_(n-2) a b c . . . p q r_(n-2) A_(n-2) R_(n-1) a b c . . . p qr_(n-1) A_(n-1)

The above examples show that, whereas using conventional classificationmethods, the stored data in the information base is an exponentialfunction of the number of fields, the inventive classification methodgrows moderately; besides, redundant information does not require extrastorage. This is due to the use of the tags, that concatenated as mostsignificant bits with the fields of the next dimension, determineordered segments, limiting the number of elements to be searched.

Tagging can be viewed as the application of the algebraic DistributiveLaw listed hereinabove, where the redundant terms are separated as acommon factor. For instance, a specific rule depicted in Table 4a forthe Classification Method of the present invention can be expressed inBoolean algebra as:R _(i) =a•T ₀ |b•T ₁ |c• . . . •T _(d-4) |p•T _(d-3) |q•T _(d-2) |r _(i)and the set of n rules can be expressed as:a•T ₀ |b•T ₁ |c• . . . •T _(d-4) |p•T _(d-3) |q•{T _(d-2) |r ₀ +T _(d-2)|r ₁ + . . . +T _(d-2) |r _(n−1)}  (d+n−1 fields)

The equivalent specific rule depicted in Table 4b for ConventionalClassification Method can be expressed as:R _(i) =a•b•c• . . . •p•q•r _(i)and the set of n rules as:a•b•c• . . . •p•q•r ₀ +a•b•c• . . . •p•q•r ₁ +a•b•c• . . . •p•q•r ₂ + .. . +a•b•c• . . . •p•q•r _(n−3) +a•b•c• . . . •p•q•r _(n−2) +a•b•c• . .. •p•q•r _(n−1)   (d×n fields)

The expressions above show in algebraic terms that the Classification ofn d-field packets with fields varying in a single dimension requires(d+n−1) tagged fields using the inventive method, whereas theconventional method requires d×n fields. This is due to the fact that inthe inventive method, the Distributive Law is used to separate theredundant terms as common factor, as mentioned above.

In general, as more dimensions are used in an information base, fewerelements are included in each dimension and a faster search perdimension can be performed. However, more dimensions require more searchsteps and increased latency; but this problem can be solved bypipelining to achieve up to one search result per clock, as described inChapter 5.

EXAMPLE 4

d-Dimensional Forwarding

A d-Dimensional Forwarding can be viewed as a special case of thed-Dimensional Classification shown in Example3 above. In this case, allthe first d-1 dimensions (numbered from 0 to d-2) contain a singleidentical field in each dimension that includes all the integer valuesin this dimension; the last dimension (numbered d-1) contains n IPDestination Addresses (IPDAs).

Table 5a shows that forwarding of n d-dimensional packets represented inby their IPDAs in the last dimension (numbered d-1) requires (d+n−1)fields in the inventive forwarding method. A conventional forwardingmethod requires, on the other hand, d×n fields, as shown in Table 5b.This comparison shows the clear advantage of this novel forwardingmethod over the conventional method with regards to storage efficiency.A field that covers all the integer values in a dimension is representedby [0,0) in the inventive Range Representation in Table 5a and by astring of xxx . . . x (don't cares) in the conventional TCAM notation;this field is denoted by “any” in Table 5b.

TABLE 5a Representation of the d-Field Ranges Required for FieldsVarying in a Single Dimension Using The Inventive Forwarding MethodField Rule 0 1 2 . . . d-3 d-2 d-1 Action R₀ [0,0) [0,0) [0,0) . . .[0,0) [0,0) IPDA₀ A₀ R₁ . . . IPDA₁ A₁ R₂ . . . IPDA₂ A₂ . . . . . . . .. . . . R_(n-3) . . . IPDA_(n-3) A_(n-3) R_(n-2) . . . IPDA_(n-2)A_(n-2) R_(n-1) . . . IPDA_(n-1) A_(n-1)

TABLE 5b Representation of the dxn d-Field Ranges Required for FieldsVarying in a Single Dimension Using the Conventional Forwarding MethodField Rule 0 1 2 . . . d-3 d-2 d-1 Action R₀ any any any . . . any anyIPDA₀ A₀ R₁ any any any . . . any any IPDA₁ A₁ R₂ any any any . . . anyany IPDA₂ A₂ . . . . . . . . . . . . . . . . . . . . . . . . . . .R_(n-3) any any any . . . any any IPDA_(n-3) A_(n-3) R_(n-2) any any any. . . any any IPDA_(n-2) A_(n-2) R_(n-1) any any any . . . any anyIPDA_(n-1) A_(n-1)

Forwarding of n d-dimensional packets represented in by their IPDAs inthe last dimension (numbered d-1), as depicted in Table 5a for theinstant Forwarding Method, can be expressed in Boolean algebra as:[0,0)•[0,0)•[0,0)• . . . •[0,0)•{IPDA₀+IPDA₁+ . . .+IPDA_(n−2)+IPDA_(n−1)}where d-1 fields denoted by [0,0) are required, totaling d+n−1 fields;[0,0) represents a field covering all the integer values in a dimensionin the instant Range Representation.

Forwarding of n d-dimensional packets, depicted in Table 5b forConventional Classification Method, can be expressed as:any•any•any• . . . •any•IPDA₀+any•any•any• . . . •any•IPDA₁+ . . .+any•any•any• . . . •any•IPDA_(n−2)+any•any•any• . . .•any•IPDA_(n−1)  (d×n fields)where n×(d-1) fields denoted by “any” are required, totaling n×d fields;“any” represents a field covering all the integer values in a dimension,equivalent to a string of xxx . . . x (don't cares) in the conventionalTCAM notation.

This is another example of the application of the algebraic DistributiveLaw to reduce the amount of stored data, by preventing the repetition ofredundant data; this time in packet forwarding.

4. Implementing Multi-Dimensional Search with RSE Devices

Classification of d-field packets expressed as a d-dimensional Keysearch over a set of d-dimensional ranges can be implemented with anytype of d associative search engines that can retrieve associated datain response to the d-fields of a submitted Key, and can be concatenatedso that the Associated Data (AD) or Tag issued by each engine isprocessed and applied with the appropriate field of the submitted Key tothe next engine. The associated data issued by the last engine definethe Classification Rules or actions to be performed on the selectedpacket. The Classification procedure requires the concatenation of theassociated data issued for each field (in each dimension) with thecomponent of the submitted Key for the next field. This operation isperformed by a Concatenation Logic, which also synchronizes theconcatenation process for maximal throughput between stages. For designpurposes, a standard engine may be used for all stages, including thefirst. In this case, a default Tag is applied to the first engine input,which determines a Key search in all the first engine ranges (instead ofa subset of ranges in the succeeding engines).

The use of RSE devices, integrated with internal or externalConcatenation Logic, provides the Multi-Dimensional Range Search Engineswith the unique RSE capabilities, such as storage of any number ofrules, any number of fields and any field widths, scalability options tobuild information base of any size with none or little glue logic, andthe performance and lowest power consumption currently available.

FIG. 22 shows d concatenated RSE devices (with internal ConcatenationLogic) conforming a d-dimensional Classification Information Base (CIB).This set of RSE devices, with either internal or external ConcatenationLogic, can be used to implement a CIB with any number of fields.

FIG. 23 shows m concatenated RSE devices (RSE⁰ _(i) to RSE^(m-1) _(i))conforming one equivalent larger RSE_(i) within a d-dimensional CIB. Ifthe field width of each partial RSE is w, then the compound RSE_(i)supports field widths up to m×w. This arrangement can be used toimplement a CIB with any field widths.

Since an RSE can be formed from multiple modules, and each module cancontain multiple RAMs, then an RSE-based CIB can support any number ofclassification rules.

EXAMPLE 5

IPv4 Classification

This example deals with the classification of packets according to theirIPv4 Classification Key (see FIG. 24). The various fields of this Keycan be arranged in a set of several dimensions for classification bymeans of a corresponding set of RSE devices.

It is assumed that the packet is parsed and the Classification Keyfields are extracted, prior to being used in classification, and theClassifier is able to perform an action on the basis of the extractedinformation. Not all these fields are necessarily used all the time;some of the fields are not used at all in some Classifiers.

Once the field values (bits) are extracted from the packet and a Key isformed, the classification key is submitted as a query to the CIB. Forinstance, if the fields used by the Classifier are INTRFC, TOS, PROT,IPSA, IPDA, SPN and DPN, then the concatenated Key is:Key=INTRFC|TOS|PROT|IPSA|IPDA|SPN|DPN

In general, a rule takes the following form:=[INTRFC _(L) , INTRFC _(H))•[TOS_(L) , TOS _(H))•[PROT _(L) , PROT_(H))•[IPSA _(L) , IPSA _(H))•[IPDA _(L) , IPDA _(H))•[SPN _(L) , SPN_(H))•[DPN_(L) , DPN _(H))/Awhere

-   is the classification rule,-   [INTRFC_(L), INTRFC_(H)) is the interface value range (see Ref. X4    for range definition),-   [TOS_(L), TOS_(H)) is the Type of Service field range,-   [PROT_(L), PROT_(H)) is the Protocol value range,-   [IPSA_(L), IPSA_(H)) is the IP Source Address value range,-   [IPDA_(L), IPDA_(H)) is the IP Destination Address value range,-   [SPN_(L), SPN_(H)) is the Source Port Number value range,-   [DPN_(L), DPN_(H)) is the Destination Port Number value range, and-   A is the action performed on the rule.    The rule states that if the packet fields INTRFC, TOS, PROT, IPSA,    IPDA, SPN and DPN fulfill the following conditions:-   INTRFC∈[INTRFC_(L), INTRFC_(H)), and-   TOS∈[TOS_(L), TOS_(H)), and-   PROT∈[PROT_(L), PROT_(H)), and-   IPSA∈[IPSA_(L), IPSA_(H)), and-   IPDA∈[IPDA_(L), IPDA_(H)), and-   SPN∈[SPN_(L), SPN_(H)), and-   DPN∈[DPN_(L), DPN_(H)),    then they are subject to action A by this rule.

A typical CIB contains many rules. In case of overlapping rules, two ormore rules may be subject to a different action. This is resolved bypriority; where the i-th classification rule

_(i) has an associated unique priority p_(i). Thus, a classificationrule can be expressed as follows:

_(i) ≡[INTRFC _(L) ^(i) ,INTRFC _(H) ^(i))•[TOS _(L) ^(i) ,TOS _(H)^(i))•[PROT _(L) ^(i) ,PROT _(H) ^(i))•[IPSA _(L) ^(i) ,IPSA _(H)^(i))•[IPDA _(L) ^(i) ,IPDA _(H) ^(i))•[SPN _(L) ^(i) ,SPN _(H)^(i))•[DPN _(L) ^(i) ,DPN _(H) ^(i))/p _(i) ,A _(i)and a set of ρ classification rules in the CIB may be expressed as a setof ρ logic equalities as above, where 0≦i≦ρ−1.

The rules may be arranged in a priority order, so that, for instance,the highest priority classification rule is

₀ and the lowest priority is

_(ρ−1). This can be also interpreted as the sequential examination ofthe rules from

₀ to

_(ρ−1); if

₀ is found true, apply A₀; if found false continue with

₁, and so on, until the first examined rule

_(e) is found and the respective action A_(e) is applied. If no rulematches the packet field, then a no-match condition is reported and adefault action A_(d) takes place.

Using this convention, the priority notion may be omitted, and the CIBclassification rule may take the following form:

_(i) ≡[INTRFC _(L) ^(i) ,INTRFC _(H) ^(i))•[TOS _(L) ^(i) ,TOS _(H)^(i))•[PROT _(L) ^(i) ,PROT _(H) ^(i))•[IPSA _(L) ^(i) ,IPSA _(H)^(i))•[IPDA _(L) ^(i) ,IPDA _(H) ^(i))•[SPN _(L) ^(i) ,SPN _(H)^(i))•[DPN _(L) ^(i) ,DPN _(H) ^(i))/A _(i)

Similarly, a set of ρ classification rules in the CIB may be expressedas a set of corresponding ρ logic equalities where 0≦i≦ρ−1.

FIG. 25 shows a generic arrangement of RSE sections for classifying asubmitted IPv4 Classification Key. The first three fields in the IPv4Classification Key (FIG. 24), INTRFC, DSCP and PROT, contain singlevalues, whereas all the other fields contain ranges of integer values;therefore, a suitable option is to integrate the first three fields intoone compound single-valued field that is classified by the first RSEsection. The other fields, consisting of ranges, are classified in thisexample by means of five other RSE sections with external ConcatenationLogic. Each of these five RSE sections is represented in FIG. 25 by aKey Memory that receives a tagged input Key, and an Associated Data (AD)Memory that issues a tag for concatenation with the next RSE section.

FIG. 26 shows an implementation of the classification device above usinga single RSE with internal Concatenation Logic. Assuming that the RSEcan perform a single search at a time, successive searches in differentfields within one classification can only be performed sequentially,resulting in a relatively long classification cycle and relatively lowthroughput. Using several RSE devices, six for instance, as shown inFIG. 27, successive searches in different fields can be performed inparallel by pipelining, thus achieving a much higher throughput. If thenumber of RSE devices used equals the number of fields, then oneclassification result per clock can be achieved by pipelining. FIG. 28shows the classification performed in two RSE devices. In this case, thesuccessive searches in different fields are performed sequentiallywithin the two RSE devices, but the two devices can operate in parallel,so that partial pipelining is achieved.

EXAMPLE 5

Comparing the Storage of IPv4 Classification Fields in a Typical TCAMand in the Inventive RSE

This example provides a comparison of the method of storage of the fourIPv4 Classification fields listed below in a typical TCAM (Table 6a)with the more efficient, inventive method used in the RSE (Table 6b).

-   Source: IP: 103.22.53.192/26 UDP/TCP Range: 103 to 416-   Destination: IP: 117.90.0.0/13 UDP/TCP Range: 71 to 75

TABLE 6a Storage of the four IPv4 Classification Fields in a TypicalTCAM Source IP Address Source UDP/TCP Port Destination IP Address DestUDP/TCP Port 0110 0111 0001 0110 0011 0101 11xx xxxx 0000 0000 0110 01110111 0101 0101 1xxx xxxx xxxx xxxx xxxx 0000 0000 0100 0111 0110 01110001 0110 0011 0101 11xx xxxx 0000 0000 0110 0111 0111 0101 0101 1xxxxxxx xxxx xxxx xxxx 0000 0000 0100 10xx 0110 0111 0001 0110 0011 010111xx xxxx 0000 0000 0110 1xxx 0111 0101 0101 1xxx xxxx xxxx xxxx xxxx0000 0000 0100 0111 0110 0111 0001 0110 0011 0101 11xx xxxx 0000 00000110 1xxx 0111 0101 0101 1xxx xxxx xxxx xxxx xxxx 0000 0000 0100 10xx0110 0111 0001 0110 0011 0101 11xx xxxx 0000 0000 0111 xxxx 0111 01010101 1xxx xxxx xxxx xxxx xxxx 0000 0000 0100 0111 0110 0111 0001 01100011 0101 11xx xxxx 0000 0000 0111 xxxx 0111 0101 0101 1xxx xxxx xxxxxxxx xxxx 0000 0000 0100 10xx 0110 0111 0001 0110 0011 0101 11xx xxxx0000 0000 1xxx xxxx 0111 0101 0101 1xxx xxxx xxxx xxxx xxxx 0000 00000100 0111 0110 0111 0001 0110 0011 0101 11xx xxxx 0000 0000 1xxx xxxx0111 0101 0101 1xxx xxxx xxxx xxxx xxxx 0000 0000 0100 10xx 0110 01110001 0110 0011 0101 11xx xxxx 0000 0001 1010 0000 0111 0101 0101 1xxxxxxx xxxx xxxx xxxx 0000 0000 0100 0111 0110 0111 0001 0110 0011 010111xx xxxx 0000 0001 1010 0000 0111 0101 0101 1xxx xxxx xxxx xxxx xxxx0000 0000 0100 10xx 0110 0111 0001 0110 0011 0101 11xx xxxx 0000 0001100x xxxx 0111 0101 0101 1xxx xxxx xxxx xxxx xxxx 0000 0000 0100 01110110 0111 0001 0110 0011 0101 11xx xxxx 0000 0001 100x xxxx 0111 01010101 1xxx xxxx xxxx xxxx xxxx 0000 0000 0100 10xx 0110 0111 0001 01100011 0101 11xx xxxx 0000 0001 0xxx xxxx 0111 0101 0101 1xxx xxxx xxxxxxxx xxxx 0000 0000 0100 0111 0110 0111 0001 0110 0011 0101 11xx xxxx0000 0001 0xxx xxxx 0111 0101 0101 1xxx xxxx xxxx xxxx xxxx 0000 00000100 10xx Note: x = don't care in TCAM Representation.

TABLE 6b Storage of the four IPv4 Classification Fields in the InventiveRSE Source IP Address Source UDP/TCP Port Destination IP Address DestUDP/TCP Port [103.22.53.192,103.22.54.0) [103,417)[117.88.0.0,117.96.0.0) [71,76)In this example, the required storage space in the TCAM is: 14×144ternary bits≅4032 binary bits. The required storage space in the RSE isinstead only 192 binary bits.

EXAMPLE 6

Comparing the Storage of ACL Fields in a Typical TCAM and in the NovelRSE

This example provides a comparison of the method of storage of aspecific ACL in a typical TCAM (Table 7a) with the more efficient methodused in the Novel RSE (Table 7b). This ACL permits the transfer of a TCPpacket arriving from any Source Address to a Destination Address rangingfrom 160.11.0.0 to 160.11.255.255, at a Destination Port Number greaterthan 1023.

TABLE 7a Storage of ACL Fields in a Typical TCAM al prot ipsa spn ipdadpn tcpflgs 0.101 6 0.0.0.0/0 0.0/0 160.11.0.0/16  4.0/6 X0X1XX 0.101 60.0.0.0/0 0.0/0 160.11.0.0/16  8.0/5 X0X1XX 0.101 6 0.0.0.0/0 0.0/0160.11.0.0/16 16.0/4 X0X1XX 0.101 6 0.0.0.0/0 0.0/0 160.11.0.0/16 32.0/3X0X1XX 0.101 6 0.0.0.0/0 0.0/0 160.11.0.0/16 64.0/2 X0X1XX 0.101 60.0.0.0/0 0.0/0 160.11.0.0/16 128.0/1  X0X1XX 0.101 6 0.0.0.0/0 0.0/0160.11.0.0/16  4.0/6 X1X0XX 0.101 6 0.0.0.0/0 0.0/0 160.11.0.0/16  8.0/5X1X0XX 0.101 6 0.0.0.0/0 0.0/0 160.11.0.0/16 16.0/4 X1X0XX 0.101 60.0.0.0/0 0.0/0 160.11.0.0/16 32.0/3 X1X0XX 0.101 6 0.0.0.0/0 0.0/0160.11.0.0/16 64.0/2 X1X0XX 0.101 6 0.0.0.0/0 0.0/0 160.11.0.0/16128.0/1  X1X0XX 0.101 6 0.0.0.0/0 0.0/0 160.11.0.0/16  4.0/6 X1X1XX0.101 6 0.0.0.0/0 0.0/0 160.11.0.0/16  8.0/5 X1X1XX 0.101 6 0.0.0.0/00.0/0 160.11.0.0/16 16.0/4 X1X1XX 0.101 6 0.0.0.0/0 0.0/0 160.11.0.0/1632.0/3 X1X1XX 0.101 6 0.0.0.0/0 0.0/0 160.11.0.0/16 64.0/2 X1X1XX 0.1016 0.0.0.0/0 0.0/0 160.11.0.0/16 128.0/1  X1X1XX

TABLE 7a Storage of ACL Fields in the Inventive RSE Al prot ipsa spnipda dpn tcpflgs 101 6 [0.0.0.0,0.0.0.0) [0.0,0.0)[160.11.0.0,160.11.0.1) [4.0,0.0) {[1,1)+[1,0)+[1,1)+[1,0)+[1,1)+[1,1)}(where the two bold left-hand fields are single valued, and all theother fields are ranges).

Table 7a shows that the storage of the ACL fields above in a typicalTCAM requires 18 rules. Since each rule has 144 ternary bits, a total of2592 ternary bits (equivalent to 518 binary bits) are used. The same ACLfields require a single rule and 342 binary bits in the inventive RSE(Table 7b).

EXAMPLE 7

IPv6 Forwarding Information Compression

Forwarding of IPv6 packets involves IP Destination Addresses (IPDAs) of128 bits. Each of these IPDAs, which actually define ranges ofaddresses, can be divided in four fields of 32 bits. Then, the search ofa single submitted 128-bit IPDA can be transformed in a search of four32-bit fields, designated IPDA₃ to IPDA₀. This search is similar to aclassification of a submitted four-dimensional Key.

FIG. 29 shows an arrangement of four RSE sections for forwarding asubmitted IPv6 packet. The first field of the submitted IPDA, designatedIPDA₃, is searched in the first field (IPDA₃) of the stored IPDAs,yielding AD₀. This result is assigned a tag Tag₀, which is concatenatedwith the second submitted field IPDA₂ and with the second field of thestored IPDAs. Then, the tagged submitted IPDA₂ (Tag₀|IPDA₂) is searchedin the tagged stored IPDA₂ fields (Tag₀|IPDA₂) yielding AD₁, whichassigned Tag₁, for concatenation with the next field IPDA₁ of thesubmitted IPDA, and so on.

This search procedure in a database of IPv6 addresses for forwardingIPv6 packets resembles the classification of four-dimensional packetsand requires the storage of a number of tagged fields that increasesmoderately, as compared to a number of fields that increasesexponentially in the conventional forwarding method, yielding highcompression of the stored information.

5. Maximizing the Multi-Dimensional Search Throughput by Pipelining

The most important parameter in every Classification System is itsthroughput expressed in number of classifications performed per second.The performance of a d-Dimensional Classification System, such as shownin FIG. 21, is determined by the following parameters:

-   T—Clock cycle of the signal used to clock the Classification System    components.-   L—Search latency for each RSE in the Classification System,    expressed in the number of clocks taken from the submission of the    k_(i) Key element to the    _(i) ¹ RSE to the appearance of a valid Tag_(i) or the action A at    the output of    _(i) ¹. It is assumed that all the RSE stages have the same latency    L.-   d—Number of dimensions or RSE stages.-   T_(c)—Time taken to perform a single Classification.-   F_(c)—Classification throughput or the maximum number of    Classifications per second that can be performed by the    Classification System.    T _(c) =d•L•T

T_(c) is also the Classification System Latency, which is the time takenfrom the start of a Key Classification until the Classification resultis available.

A Classification can start only after the previous one has beencompleted. The Classification throughput is:$F_{c} = \frac{1}{d \cdot L \cdot T}$Thus, the Classification System Latency is proportional to the number offields or dimensions applied. This may become a problem if the latencyis too long. However, in practical cases, this time may be as long as1000 nsec for 10 fields or dimensions. Even for a critical application,such as an ultra high-performance Switch/Router, this latency istolerable.

However, the degradation in throughput is not tolerable. Let's assumethat the single RSE throughput is 250 Million lookups per second (Mlps).

The implementation of a 10-field Classification in this fashion wouldresult in a Classification System capable of 25 Million classificationsper second (Mcps). For some applications, the number of classificationfields can be greater, and therefore severely degraded.

Since the basic RSE is capable of a full Lookup Pipeline at a constantrate, this problem may be easily overcome, as shown in FIG. 30.

Each stage of the one-dimensional RSEs

₀ ¹,

₁ ¹, . . . ,

_(d-1) ¹ is capable of simultaneously performing L Lookups in apipelined fashion.

Thus, while the 0-dimension field Key k₀[(p+L•d)•T] is input to the RSE

₀ ¹, this engine processes Lookups on Keys k₀[(p+L−d•1)•T] tok₀[(p+L•d-L+1)•T] and outputs the Tag₀ result for the Keyk₀[(p+L•d-L)•T]. The accompanying match signal m₀ indicates whether theLookup for k₀[(p+L•d-L)•T] results in a miss or a hit.

The operation of the next stage

₁ ¹ is synchronized by the Ready₀ signal, which originates in

₀ ¹ and accompanies the Tag₀ and the m₀ results. When Ready₀ is “true”,

₁ ¹ simultaneously samples m₀, Tag₀ and the 1^(st)-dimension Keyk₁[(p+L•d-L)•T]. Key k₁[(p+L•d-L)•T] is concatenated with Tag₀ from

₀ ¹ SO and used as a Lookup Key in

₁ ¹.

Starting with

₁ ¹ and ending with

_(d-1) ¹, a wave of new Lookups starts execution on the concatenatedKeys of the type Tag_(i)|k_(i)[(p+L•d-L•i)•T], 1≦i<d-1.

At the same time, the last-dimension RSE

_(d-1) ¹ starts the Lookup execution on the KeyTag_(d-1)|k_(d-1)[(p+L)•T], executes Lookups on KeysTag_(d-1)|k_(d-1)[(p+L−1)•T] to Tag_(d-1)|k_(d-1)[(p+1)•T], and outputsthe result for the Key Tag_(d-1)|k_(d-1)[p•T]. This is actually theclassification result for the Key K^(d)(p•T) that was submitted forSearch at the p-th clock.K ^(d)(p•T)≡[k ₀(p•T),k ₁(p•T), . . . k _(d-1)(p•T)]

Thus, at the (p+L•d)^(th) clock cycle, the Classification Systemperforms L•d simultaneous classifications on L•d submitted d-dimensionalKeys, from K^(d)[(p+1)•T] to K^(d)[(p+L•d)•T], and outputsA[K^(d)(p•T)], which is the classification result for K^(d)(p•T),provided that m[K^(d)(p•T)]=‘1’.

Thus, this Classification System is capable of outputting oneclassification result at every clock cycle. The machine throughput F_(c)is: $F_{c} = \frac{1}{T}$

It can be seen that the machine throughput does not depend on the numberof classification dimensions, d, nor on the single RSE stage latencyL•T.

The total latency of this system is not better than the latency of thenon-pipelined Classification System, that is,T _(c) =d•L•T

It is important to note that a proper pipeline operation requires avariable delay from the Key submission time to the start of the KeyAssociated Search in each dimension. No delay is required to start thesearch in

₀ ¹.

Since the result of this Key Search is output by

₀ ¹ after L•T clock cycles, and since this result is required to performthe search in the 1^(st) dimension RSE

₁ ¹, then the 1^(st)-dimension Key must be stored and delayed for L•Tclock cycles before being applied. For pipeline operation,

₁ ¹ must be capable of storing L 1^(st)-dimension Keys.

Similarly, the 2^(nd)-dimension RSE

₂ ¹ must delay the Key data by 2•L•T clocks, and must be capable ofstoring the 2•L 2^(nd)-dimension Keys, and so on for the succeedingdimensions. The last RSE

_(d-1) ¹ must delay the Key data by (d-1)•L•T clocks and must be capableof storing [(d-1)•L] (d-1)^(th)-dimension Keys.

The Classification System shown in FIG. 30 uses the Ready signal,originating in one RSE stage and input to the following RSE stage, toproperly time the start of the execution search in this latter stage.Also, each stage is equipped with a queue capable of storing all thequeued Keys until their execution starts. The longest queue is of courseattached to the

_(d-1) ¹ stage and must store (d-1)•L Keys.

It is important to note that the outlined method is in no way limited toRSEs. The same method applies to other one-dimensional memory types,such as Binary and Ternary CAMs, provided that there is an AssociatedData linked to the Key Entry memory. Furthermore, it is possible to usethe most appropriate type of associative memory for any given field andintermix associative memory types, as needed, to implement aClassification System.

6. Link Diagrams

A link diagram is a technique that maps classification rules into theClassification System. It shows the ranges in each dimension as well astheir linkage to the ranges in the follow-on dimension. The lastdimension specifies the actions to be performed on a multi-dimensionalKey that matches the rule.

Note: In the notation used in the examples shown below, it is impliedthat all the ranges (in all dimensions) that are not included in thelink diagram do not match the rule; also, no default actions arespecified for the submitted multi-dimensional Keys that do not match therules. An alternative notation may specify a default action for all theKeys that do not match the rule.

EXAMPLE 8

This example describes the case of two disjoint two-dimensional rangeswith overlapping projections in the y direction. FIG. 31 a depicts thetwo-dimensional rule for this case.

By convention, all the projected boundaries are marked on the x-axis andon the y-axis in their ascending order; that is, the one closer to theorigin has a lower index. The closest projected point is marked withindex 0. Thus, the x-dimension and y-dimension boundaries are ordered asfollows:x ₀ <x ₁ < . . . <x _(n−1) <x _(n)andy ₀ <y ₁ < . . . <y _(n−1) <y _(n)

Note: This convention is important because it enables the algebraicmanipulation and determination of overlapping range domains. Algebraicmanipulation can be implemented in either software or hardware-embeddedalgorithms.

We use the Range Algebra presented in Chapter 3 to express a rule in aconvenient and compact fashion. The rule R₁ depicted by FIG. 31 a can beexpressed by the following algebraic formula:R ₁ =[x ₀ ,x ₁)X[y ₀ ,y ₂)/A ₀ /p ₀ +[x ₂ ,x ₃)X[y ₁ ,y ₃)/A ₁ /p ₁

The Link Diagram for R₁ equivalent to the algebraic expression above isshown in FIG. 31 b. The entries at the left side of the diagram belongto the x dimension. Altogether, there are four entries; two define therange [x₀,x₁) and two define the range [x₂,x₃). The four entries at theright side of the diagram belong to the y dimension, and define the tworanges [y₀,y₂) and [y₁,y₃). The links between the two x-dimension rangesand the two y-dimension ranges describe the rule R₁.

A Key K²=(k_(x),k_(y)) is submitted for a search. If k_(x)∈[x₀,x₁), thenthe Associated Data (which is the tag T₀) is output and used as a linkto the T₀|[y₀,y₂) entry in the y-dimension RSE. If, also,T₀|k_(y)∈T₀|[y₀,y₂), then K²=(k_(x),k_(y))∈[x₀,x₁)X[y₀,y₂). Thus, theaction A₀ is taken.

Similarly, if k_(x)∈[x₂,x₃), then the tag T₁ is used as a link to theT₁|[y₁,y₃) entry. If, besides, T₁|k_(y)∈T₁|[y₁,y₃), thenK²=(k_(x),k_(y))∈[x₂,x₃)X[y₁,y₃), and the action A₁ is taken.

The associated data in the x dimension are the tags that link thex-dimension results with a search over a subset of tagged ranges in they dimension. The two tags must be different in order to yield Lookups inthe appropriate range subset.

If the Key K²=(k_(x),k_(y)) submitted for a search lies outside of thetwo disjoint two-dimensional ranges, then it does not match rule R₁; adefault action may be specified for this case.

Table 8a lists the links between the x-dimension and y-dimension rangesfor R₁. Table 8b lists the corresponding links between the lower closeboundaries of ranges in the two dimensions, in accordance with theinstant storage method in RAM-based RSE devices.

TABLE 8a List of Linked Ranges for Rule R₁ x Dimension Tag y DimensionAction [x₀,x₁) T₀ T₀|[y₀,y₂) A₀ [x₁,x₂) T₁ T₁|[y₁,y₃) A₁

TABLE 8b List of Linked Range Boundaries for Rule R₁ x Dimension Tag yDimension Action x₀ T₀ T₀|y₀ A₀ x₁ T₀ T₀|y₂ A₀ x₂ T₁ T₁|y₁ A₁ x₃ T₁T₁|y₃ A₁

EXAMPLE 9

This example deals with two disjoint two-dimensional ranges overlappingin the x direction, as shown in FIG. 32 a. The rule R₂ depicted by FIG.32 a is equivalently expressed by the following algebraic formula:$\begin{matrix}{R_{2} = {{\left. \left\lbrack {x_{0},x_{2}} \right. \right)\quad{{\left. {X\left\lbrack {y_{0},y_{1}} \right.} \right)/A_{0}}/p_{0}}} + {\left. \left\lbrack {x_{1},x_{3}} \right. \right)\quad{{\left. {X\left\lbrack {y_{2},y_{3}} \right.} \right)/A_{1}}/p_{1}}}}} \\{= {{{\left. {\left\{ {\left. \left\lbrack {x_{0},x_{1}} \right. \right)\quad + \left. \left\lbrack {x_{1},x_{2}} \right. \right)} \right\} X\left\lbrack {y_{0},y_{1}} \right.} \right)/A_{0}}/p_{0}} +}} \\{{\left. {\left\{ {\left. \left\lbrack {x_{1},x_{2}} \right. \right)\quad + \left. \left\lbrack {x_{2},x_{3}} \right. \right)} \right\} X\left\lbrack {y_{2},y_{3}} \right.} \right)/A_{1}}/p_{2}} \\{= \underset{\_}{{\left. \left\lbrack {x_{0},x_{1}} \right. \right)\quad{{\left. {X\left\lbrack {y_{0},y_{1}} \right.} \right)/A_{0}}/p_{0}}} + {\left. \left\lbrack {x_{1},x_{2}} \right. \right)\quad X\left\{ {{{\left. \left\lbrack {y_{0},y_{1}} \right. \right)/A_{0}}/p_{0}} +} \right.}}} \\{\underset{\_}{{\left. {\left. {\left. {{\left. \left\lbrack {y_{2},y_{3}} \right. \right)/A_{1}}/p_{1}} \right\} + \quad\left. \left\lbrack {x_{2},x_{3}} \right. \right)} \right\}{x\left\lbrack {y_{2},y_{3}} \right.}} \right)/A_{1}}/p_{1}}}\end{matrix}$

The associated Link Diagram for this rule is shown in FIG. 32 b. In thisparticular case, three separate tags are required. The y-dimension range[y₀,y₁) is tagged once with T₀ and once with T₁. Similarly, [y₂,y₃) istagged once with T₁ and once with T₂.

Table 9a lists the links between the x-dimension and y-dimension rangesfor R₂. Table 9b lists the corresponding links between the lower closeboundaries of ranges in the two dimensions, suitable for the presentstorage method in RAM-based RSE devices.

TABLE 9a List of Linked Ranges for Rule R₂ x Dimension Tag y DimensionAction [x₀,x₁) T₀ T₀|[y₀,y₁) A₀ [x₁,x₂) T₁ T₁|[y₀,y₁) A₀ T₁|[y₂,y₃) A₁[x₂,x₃) T₂ T₁|[y₂,y₃) A₁

TABLE 9b List of Linked Range Boundaries for Rule R₂ x Dimension Tag yDimension Action x₀ T₀ T₀|y₀ A₀ x₁ T₀ T₀|y₁ A₀ T₁ T₁|y₀ A₀ T₁|y₂ A₁ x₂T₁ T₁|y₁ A₀ T₁|y₃ A₁ T₂ T₂|y₂ A₁ x₃ T₂ T₂|y₃ A₁

EXAMPLE 10

In this example, one two-dimensional range is a proper sub-range of theother two-dimensional range, as shown in FIG. 33 a. The followingalgebraic formula expresses the rule R₃ depicted by FIG. 33 a:$\begin{matrix}{R_{3} = {{{\left. {\left\{ {\left. \left\lbrack {x_{0},x_{1}} \right. \right) + \left. \left\lbrack {x_{2},x_{3}} \right. \right)} \right\} X\left\lbrack {y_{0},y_{3}} \right.} \right)/A_{1}}/p_{1}} +}} \\{\left. \left\lbrack {x_{1},x_{2}} \right. \right)X\left\{ {{{\left. \left\lbrack {y_{0},y_{3}} \right. \right)/A_{1}}/p_{1}} + {{\left. \left\lbrack {y_{1},y_{2}} \right. \right)/A_{0}}/p_{0}}} \right\}} \\{= {{{\left. {\left\{ {\left. \left\lbrack {x_{0},x_{1}} \right. \right) + \left. \left\lbrack {x_{2},x_{3}} \right. \right)} \right\} X\left\lbrack {y_{0},y_{3}} \right.} \right)/A_{1}}/p_{1}} +}} \\{\left. \left\lbrack {x_{1},x_{2}} \right. \right) + {X\left\{ {{{\left. \left\lbrack {y_{0},y_{1}} \right. \right)/A_{1}}/p_{1}} + {{\left. \left\lbrack {y_{1},y_{2}} \right. \right)/A_{0}}/p_{0}} +} \right.}} \\{\left. {{\left. \left\lbrack {y_{2},y_{3}} \right. \right)/A_{1}}/p_{1}} \right\}}\end{matrix}$

FIG. 33 b depicts the associated Link Diagram. In this case, only twoseparate tags are required. Two x-dimension ranges, [x₀,x₁) and [x₂,x₃),are tagged with T₀, because both are linked to the same y-dimensionrange [y₀,y3).

Table 10a lists the links between the x-dimension and y-dimension rangesfor R₃. Table 10b lists the corresponding links between the lower closeboundaries of ranges in the two dimensions, suitable for the inventivestorage method for utilization in RSE devices. The link between [x₂,x₃)and [y₀,y₃) by T₀ (shadowed) is redundant because it also serves[x₀,x₁); thus, T₀|[y₀,y₃) appears only once in the stored database.

TABLE 10a List of Linked Ranges for Rule R₃ x Dimension Tag y DimensionAction [x₀,x₁) T₀ T₀|[y₀,y₃) A₁ [x₁,x₂) T₁ T₁|[y₀,y₁) A₁ T₁|[y₁,y₂) A₀T₁|[y₂,y₃) A₁ [x₂,x₃) T₀ T₀|[y₀,y₃) A₁

TABLE 10b List of Linked Range Boundaries for Rule R₃ x Dimension Tag yDimension Action x₀ T₀ T₀|y₀ A₁ x₁ T₀ T₀|y₃ A₁ T₁ T₁|y₀ A₁ T₁|y₁ A₀T₁|y₂ A₁ x₂ T₁ T₁|y₁ A₁ T₁|y₂ A₀ T₁|y₃ A₁ T₀ T₀|y₀ A₁ x₃ T₀ T₀|y₃ A₁

EXAMPLE 11

This example deals with two partially overlapping two-dimensional rangesin the x and y directions, as shown in FIG. 34 a. The followingalgebraic formula expresses the rule R₃ depicted by FIG. 34 a:$\begin{matrix}{{{\left. {R_{4} = {\left. \left\lbrack {x_{0},x_{2}} \right. \right)X\left\lbrack {y_{0},y_{2}} \right.}} \right)/A_{0}}/p_{0}} + {\left. \left\lbrack {x_{1},x_{3}} \right. \right)\quad{{\left. {X\left\lbrack {y_{1},y_{3}} \right.} \right)/A_{1}}/p_{1}}}} \\{= {{{\left. {\left\{ {\left. \left\lbrack {x_{0},x_{1}} \right. \right) + \left. \left\lbrack {x_{1},x_{2}} \right. \right)} \right\} X\left\lbrack {y_{0},y_{2}} \right.} \right)/A_{0}}/p_{0}} +}} \\{{\left. {{{\left. {\left. \left\lbrack {x_{1},x_{2}} \right. \right)X\left\lbrack {y_{2},y_{3}} \right.} \right)/A_{1}}/p_{1}} + {\left. \left\lbrack {x_{2},x_{3}} \right. \right)X\left\lbrack {y_{1},y_{3}} \right.}} \right)/A_{1}}/p_{1}} \\{= \underset{\_}{{{\left. {\left. \left\lbrack {x_{0},x_{1}} \right. \right)X\left\lbrack {y_{0},y_{2}} \right.} \right)/A_{0}}/p_{0}} + {\left. \left\lbrack {x_{1},x_{2}} \right. \right)X\left\{ {{{\left. \left\lbrack {y_{0},y_{2}} \right. \right)/A_{0}}/p_{0}} +} \right.}}} \\{\underset{\_}{{\left. {\left. {{\left. \left\lbrack {y_{2},y_{3}} \right. \right)/A_{1}}/p_{1}} \right\} + {\left. \left\lbrack {x_{2},x_{3}} \right. \right)X\left\lbrack {y_{1},y_{3}} \right.}} \right)/A_{1}}/p_{1}}}\end{matrix}$

FIG. 34 b depicts the associated Link Diagram. In this particular case,three separate tags are required. The y-dimension range [y₀,y₂) istagged once with T₀ and once with T₁.

Table 11a lists the links between the x-dimension and y-dimension rangesfor R₄. Table 11b lists the corresponding links between the lower closeboundaries of ranges in the two dimensions, in accordance with theinventive storage method implemented in RSE devices.

TABLE 11a List of Linked Ranges for Rule R₄ x Dimension Tag y DimensionAction [x₀,x₁) T₀ T₀|[y₀,y₂) A₀ [x₁,x₂) T₁ T₁|[y₀,y₂) A₀ T₁|[y₂,y₃) A₁[x₂,x₃) T₂ T₁|[y₂,y₃) A₁

TABLE 11b List of Linked Range Boundaries for Rule R₄ x Dimension Tag yDimension Action x₀ T₀ T₀|y₀ A₀ x₁ T₀ T₀|y₂ A₀ T₁ T₁|y₀ A₀ T₁|y₂ A₁ x₂T₁ T₁|y₂ A₀ T₁|y₃ A₁ T₂ T₂|y₁ A₁ x₃ T₂ T₂|y₃ A₁

EXAMPLE 12

Two partially overlapping two-dimensional ranges in the x and ydirections, containing redundant information, are provided in FIG. 35.

The following algebraic formula expresses the rule R₃ depicted by FIG.35 a: $\begin{matrix}{{{\left. {R_{5} = {\left. \left\lbrack {x_{0},x_{1}} \right. \right)X\left\lbrack {y_{1},y_{2}} \right.}} \right)/A_{0}}/p_{0}} + {\left. \left\lbrack {x_{1},x_{2}} \right. \right)X\left\{ {{{\left. \left\lbrack {y_{0},y_{1}} \right. \right)/A_{1}}/p_{1}} +} \right.}} \\{{\left. {{{\left. \left\lbrack {y_{1},y_{2}} \right. \right)/A_{0}}/p_{0}} + {{\left. \left\lbrack {y_{2},y_{3}} \right. \right)/A_{1}}/p_{1}}} \right\}} +} \\{{\left. {\left. \left\lbrack {x_{2},x_{3}} \right. \right)X\left\lbrack {y_{1},y_{2}} \right.} \right)/A_{0}}/p_{0}} \\{= \underset{\_}{{{\left. {\left\{ {\left. \left\lbrack {x_{0},x_{1}} \right. \right) + \left. \left\lbrack {x_{2},x_{3}} \right. \right)} \right\} X\left\lbrack {y_{1},y_{2}} \right.} \right)/A_{0}}/p_{0}} + \left\{ {{{\left. \left\lbrack {y_{0},y_{1}} \right. \right)/A_{1}}/p_{1}} +} \right.}} \\{\underset{\_}{\left. {{{\left. \left\lbrack {y_{1},y_{2}} \right. \right)/A_{0}}/p_{0}} + {{\left. \left\lbrack {y_{2},y_{3}} \right. \right)/A_{1}}/p_{1}}} \right\}}}\end{matrix}$

FIG. 35 b depicts the associated Link Diagram. In this case, only twoseparate tags are required. Two x-dimension ranges, [x₀,x₁) and [x₂,x₃),are tagged with T₀, because both are linked to the same y-dimensionrange [y₁,y₂).

Table 12a lists the links between the x-dimension and y-dimension rangesfor R₅. Table 12b lists the corresponding links between the lower closeboundaries of ranges in the two dimensions, suitable for the inventivestorage method used in RSE devices. Similarly to the redundant link inR₃, the link between [x₂,x₃) and [y₁,y₂) by T₀ (shadowed) is redundantbecause it also serves [x₀,x₁); thus, T₀|[y₁,y₂) appears only once inthe stored database.

TABLE 12a List of Linked Ranges for Rule R₅ x Dimension Tag y DimensionAction [x₀,x₁) T₀ T₀|[y₁,y₂) A₁ [x₁,x₂) T₁ T₁|[y₀,y₁) A₁ T₁|[y₁,y₂) A₀T₁|[y₂,y₃) A₁ [x₂,x₃) T₀ T₀|[y₁,y₂) A₁

TABLE 12b List of Linked Range Boundaries for Rule R₅ x Dimension Tag yDimension Action x₀ T₀ T₀|y₁ A₁ x₁ T₀ T₀|y₂ A₁ T₁ T₁|y₀ A₁ T₁|y₁ A₀T₁|y₂ A₁ x₂ T₁ T₁|y₁ A₁ T₁|y₂ A₀ T₁|y₃ A₁ T₀ T₀|y₁ A₁ x₃ T₀ T₀|y₂ A₁

Comparing Example 8 (for two disjoint two-dimensional ranges withdisjoint projections in the x direction and overlapping projections inthe y direction) and Example 9 (for two disjoint two-dimensional rangeswith disjoint projections in the y direction and overlapping projectionsin the x direction), it can be seen that Rule R₁ in Example 8 is muchsimpler and can be expressed with a smaller number of ranges.Generalizing, it is simpler, faster and more storage efficient toperform the multi-dimensional classification procedure starting in thedirections where the projections of the multi-dimensional ranges aredisjoint and then proceeding in the directions where the projectionsoverlap.

If the multi-dimensional ranges contain fields with single values, suchas the first three fields in the IPv4 Classification Key (FIG. 24), itis most efficient to integrate the single-valued fields into oneseparate field (or dimension) and apply the classification procedure (byexact match) in this field first, and then proceed with the ranges inthe directions with disjoint projections, as mentioned before. Althoughexact match can be viewed as a special case of a range, it is preferableto represent it as a binary match because it leads to astorage-efficient representation (requires one integer value, instead oftwo, required in range representation).

Example 10 (where one two-dimensional range is a proper sub-range ofanother two-dimensional range) and Example 12 (a special case of twopartially overlapping two-dimensional ranges) are similar in having twodifferent x-dimension ranges concatenated to the same y-dimension range.In both cases the same Tag T₀ serves to concatenate the ranges in thetwo dimensions. This representation prevents redundancy in the storageof the y-dimension range and in the rule expressions.

Single tagging to the same range can be viewed as pointers directed tothe same addresses in Directed Acyclic Graphs (DAGs). DAGs, generallyused in software, are implemented in RSE hardware to reduce the amountof stored data and rule expressions, by preventing the repetition ofredundant data. DAGs used in this way provide a great advantage overTrie structures, where the same addresses appear repeatedly in differentbranches, leading to more complicated rules and storage explosion.

The algebraic formulas associated with the link diagrams, show thatsingle tagging to the same range is reflected in grouping the twodifferent x-dimension ranges concatenated with the same y-dimensionrange inside the brackets. This can be seen as the application algebraicDistributive Law, listed hereinabove, to separate the redundant terms inthe as common factors in the formulas. The order of operations is firston the terms grouped inside the brackets (or parentheses) and then onthe resulting term with the common factor separated outside thebrackets. In the conventional classification methods, represented byTrie structures, the expanded algebraic expression is used and thedistributed terms undergo separate operations; thus, the same termsappear repeatedly, requiring to larger expressions and more terms to bestored. This can be clearly seen in the following simple example.

EXAMPLE 13

This example shows the difference between the number of range terms andoperations in the grouped and expanded algebraic expressions.{[a,b)+[c,d)}•{[e,f)+[g,h)+[j,k)}=[a,b)•[e,f)+[a,b)•[g,h)+[a,b)•[j,k)+[c,d)•[e,f)+[c,d)•[g,h)+[c,d)•[j,k)

The left-hand grouped expression contains 5 range terms. The order ofoperations is first the execution of 5 OR operations within the twobrackets, and then one AND operation on the two results, totaling 6operations.

The equivalent right-hand expanded expression contains 12 terms. Theorder of operations is first the execution of 6 AND operations, and then5 OR operations on the six results, totaling 11 operations.

If each range boundary consists of 32 bits, then the 10 range boundariesof the 5 range terms in the grouped expression contain 10×32=320 bits,whereas the expanded expression, with 24 range boundaries for 12 rangeterms, requires 24×32=768 bits.

This advantage in the number of stored terms, combined with theadvantages provided by the inventive Range Representation over theprefix notation in more compact storage and aggregation of CIDR addressranges, results in much smaller storage space in the RSE in comparisonwith any TCAM.

Multi-field classification can be applied to numerous practical problemssolving. A few applications are listed below:

-   Medicine: A set of rules may include a CIB aimed at identifying a    disease. Another set of rules may define symptoms of cancerous    cells, and be applied to scan the human body to identify all the    locations of the cancerous cells.-   Industry: Planning the three-dimensional motion of a robot's arm    moving amidst solid obstacles and aimed at reaching predefined    coordinates. In this case, the set of rules pertain to the    positioning of the solid obstacles.-   Criminology: Sorting out individuals who are potentially involved in    a crime to be resolved. This can be done considering fingerprints,    hair, eye and skin color, height, DNA, age, gender, language spoken,    accent, address, car ownership, etc. These and other attributes can    be listed as rules in a CIB. A query that describes the suspect is    submitted to the CIB, and a list of all potential suspects that meet    the description is issued.-   Data Communications: Routers classify data packets to determine    which policies, actions and measures must be taken. These actions    are based upon predefined data packet fields and a set of rules    stored in the Classifier/CIB. The fields themselves, their location    in the packet header and their meaning, vary on the basis of the    networking protocols used for communications. Since the Internet is    a vastly accepted world standard, the examples provided hereinbelow    are oriented towards this standard, in particular to TCP/IP, which    mainly deals with layers 3 and 4 of the Open Systems Interconnection    (OSI)-like Reference model. It should be emphasized, however, that    other layers, such as layer 1 (interface), layer 2 (media access)    and layer 7 (data or content), are often used to improve the    classification-based decision making. Packet classification results    in instructing the router to perform specific actions on the packet.    Examples of these action decisions are:    -   Allow or deny the packet through the router: This decision is        defined as Packet Filtering. By excluding packets that may pose        a security risk to a network or to its nodes, network usage is        made safer and its resources are dedicated to its main        function—productive communication among the users.    -   Guaranteeing a committed level of service: Provided that a        Service Level Agreement (SLA) is signed in between the service        provider that owns the router and a customer, customer packets        are authenticated and provided a required level of service. For        instance, voice packets can be routed via an ATM network, which        guarantees a low delay path required to facilitate voice        communications. Similarly, video packets may be routed through a        different port, which guarantees a high throughput. Another        example is the preferential treatment of certain packets under        congestion conditions, such that they are serviced while other        packets are dropped. Using several fields from the packet        header, the router can identify the Quality of Service (QoS)        required and authenticate the eligible service level. Of course,        the SLA involves non-standard treatment as well as higher        service cost charged to the customer.    -   Packet accounting: Packet accounting serves a two-fold purpose.        First, accounting information is collected on the packets that        receive a special service and which imply higher service cost.        The collected information typically includes the accumulated        number of packets, the total number of transferred bytes and the        time of service. Packet accounting can be motivated also by        network security. For instance, intrusion into a protected        system can be identified, by identifying an abnormal number of        attempts to establish a connection with a certain destination in        a predefined amount of time, or by observing a scan        activity—characterized by packets attempting to establish a        connection with a range of sequential destination addresses        and/or ports. Similarly, a router can classify packets on the        basis of specified rules applied to the packet fields. A        classification filter-matching packet is counted and the total        count is applied to detect a Denial of Service (DoS) attack.

As used herein in the specification and in the claims section thatfollows, the term “single integer data” and the like refer to entriesthat correspond to a single string containing 0's, 1's or a combinationthereof. An example of single integer data is 01101011, which would beexactly matched by the following input key 01101011. The term “singleinteger data” is specifically meant to exclude range data of variousforms, including 01X010XX and [1, 27).

Although the invention has been described in conjunction with specificembodiments thereof, it is evident that many alternatives, modificationsand variations will be apparent to those skilled in the art.Accordingly, it is intended to embrace all such alternatives,modifications and variations that fall within the spirit and broad scopeof the appended claims. All publications, patents and patentapplications mentioned in this specification are herein incorporated intheir entirety by reference into the specification, to the same extentas if each individual publication, patent or patent application wasspecifically and individually indicated to be incorporated herein byreference. In addition, citation or identification of any reference inthis application shall not be construed as an admission that suchreference is available as prior art to the present invention.

1. A device for storing data in a memory, and for extracting the datatherefrom based on a multi-dimensional input (MDI) key, the devicecomprising: (a) a first associative search engine (ASE), and (b) atleast a second ASE, each ASE including: (i) a memory having: (A) a firstarray of cells containing a field of entries, each of said cells havinga unique address and being accessible via an input key including astring corresponding to at least a portion of the MDI key, and (B) asecond array of cells having a plurality of associated data entries,each of said associated data entries being associated with a particularone of said entries in said first array, and (ii) control logic for saidmemory, said control logic operatively connecting said first ASE andsaid second ASE, said control logic designed and configured forprocessing at least a portion of said entries in said first array fromeach said ASE, in response to said input key, so as to make adetermination if there exists a match between said input key and anentry of said entries in said field; said control logic designed andconfigured to produce a result based on said determination, wherein saidresult pertains to at least one of said associated data entries, andwherein said control logic utilizes said result from said first ASE insaid processing of said second ASE, so as to narrow searching withinsaid second ASE.
 2. The device of claim 1, wherein each said field isconfigured so as to correspond to at least a portion of the MDI key. 3.The device of claim 2, wherein each said field is configured so as tocorrespond to a different portion of the MDI key.
 4. The device of claim1, wherein said result from said first ASE is incorporated within saidinput key of said second ASE.
 5. The device of claim 1, furthercomprising: (c) at least one concatenating element for concatenatingsaid result from said first ASE in said input key of said second ASE toform a concatenated input key.
 6. The device of claim 5, wherein eachsaid concatenating element is operatively paired with each said at leastsecond ASE.
 7. The device of claim 5, wherein said concatenating elementis designed and configured such that said result forms at least one mostsignificant bit of said concatenated input key.
 8. The device of claim5, wherein said at least one concatenation element is disposed withinsaid at least second ASE.
 9. The device of claim 1, further comprising:(c) at least one selecting element for selecting, based on said resultfrom said first ASE, a portion of said field within said first array ofsaid second ASE so as to narrow said searching within said second ASE.10. The device of claim 1, wherein said result includes a matchindicator.
 11. The device of claim 1, wherein said field of entries insaid first array of at least one of said first and second ASE includesrange boundary information.
 12. The device of claim 11, wherein saidrange boundary information is a single range-boundary value.
 13. Thedevice of claim 12, wherein each said range boundary value is disposedin a separate memory cell of said first array, so as to produce amonotonic order.
 14. The device of claim 11, wherein said memory isdesigned and configured to include: (C) range validity information foreach of said range boundary information.
 15. The device of claim 11,wherein each said ASE further includes: (iii) sorting means forarranging said range boundary information in a monotonic order withinsaid first array.
 16. The device of claim 1, wherein said first arrayhas at least two dimensions, said first array consisting of rows andcolumns, said second array has at least two dimensions, said secondarray consisting of rows and columns, and wherein each of saidassociated data entries has a unique pair of row and column indices forassociation with a unique pair of row and column indices of a particularone of said entries within said field of entries.
 17. The device ofclaim 16, wherein said entries in said field of at least one ASEincludes single integer data, and wherein said field of entries of anASE of said at least a second ASE includes range boundary information.18. The device of claim 17, wherein said field including single integerdata is disposed within said first ASE.
 19. The device of claim 17,wherein said processing of said entries within said field of said firstASE and said field of said at least second ASE is sequentially orderedsuch that a single integer data field is processed first.
 20. The deviceof claim 17, wherein said processing of said entries within said fieldof said first ASE and said field of said at least second ASE issequentially ordered such that: (i) any single integer data fields areprocessed prior to range fields, and (ii) among said range fields, moredisjoint fields are processed prior to less disjoint fields.
 21. Thedevice of claim 1, wherein said field of entries within said first arrayis maintained in a monotonic order.
 22. The device of claim 1, whereinat least two of said first ASE and said at least second ASE areconfigured to handle a long string in a single dimension of the MDI key,the device being designed and configured to split said long string intoat least two input keys, each of said input keys for inputting into adifferent one of said first ASE and said second ASE.
 23. The device ofclaim 1, wherein the MDI key is one of a series of MDI keys, the devicebeing designed and configured to process portions of said MDI keys bypipelining, so as to improve a performance of the device.
 24. The deviceof claim 1, wherein the MDI key is one of a series of MDI keys, saidseries represented by k₀ . . . k_(m), k_(m+1) . . . k_(n), wherein: k isone of said MDI keys, k₀ is a first of said MDI keys, n is a number of alast of said MDI keys, n≧1, and m is a number of one of said MDI keys,n≧m+1, and wherein at least two ASEs of said first ASE and said at leastsecond ASE are designed and configured to process portions of said MDIkeys by pipelining, such that said second of said ASEs processes aportion of key k_(m) while a first of said ASEs processes a differentportion of key k_(m+1), so as to improve a performance of the device.25. The device of claim 1, wherein each said associative search enginefurther includes: (iii) output means for outputting said result.
 26. Thedevice of claim 1, wherein said first ASE and said at least second ASEare disposed within a single chip.
 27. The device of claim 1, whereinthe MDI key includes an IPv4 classification key.
 28. The device of claim1, wherein the MDI key includes an Ipv6 classification key.
 29. A methodof storing data in a memory, and for extracting the data therefrom basedon a multi-dimensional input (MDI) key, the method comprising the stepsof: (a) providing a device including: (i) a first and at least a secondassociative search engine (ASE), each ASE including: (A) a memoryincluding: (I) a first array of cells containing a field having aplurality of entries, and (II) a second array of cells having aplurality of associated data entries, wherein each of said associateddata entries is associated with a particular one of said entries in saidfirst array, and (B) control logic for said memory; (b) inputting aninput key to each said ASE, said input key including a stringcorresponding to at least a portion of the MDI key; (c) processing atleast a portion of said entries in said first array from each said ASE,in response to said input key, so as to make a determination if thereexists a match between said input key and an entry of said entries insaid field; (d) producing a result based on said determination, saidresult pertaining to at least one of said associated data entries, and(e) utilizing said result from said first ASE in said processing of step(c) of said second ASE.
 30. The method of claim 29, wherein each saidstring corresponds to a particular first array in a one-to-onecorrespondence.
 31. The method of claim 29, wherein said processingincludes searching, and wherein step (e) is performed so as to narrowsaid searching within said second ASE.
 32. The method of claim 29,wherein said utilizing includes incorporating said result from saidfirst ASE in said input key of said second ASE.
 33. The method of claim29, wherein said utilizing includes concatenating said result from saidfirst ASE in said input key of said second ASE to form a concatenatedinput key.
 34. The method of claim 33, wherein said concatenating isperformed such that said result forms at least one most significant bitof said concatenated input key.
 35. The method of claim 29, wherein eachsaid input key for said first and said second ASE includes a differentportion of the MDI key.
 36. The method of claim 29, wherein saidutilizing includes selecting a sub-set of said entries in said firstarray of said second ASE, based on said result from said first ASE, saidsub-set being smaller than said plurality of entries in said first arrayof said second ASE.
 37. The method of claim 29, wherein said resultincludes a match indicator.
 38. The method of claim 29, wherein saidentries in said first array of at least one of said first and second ASEinclude range boundary information.
 39. The method of claim 38, whereinsaid first array has at least two dimensions, said first arrayconsisting of rows and columns, and wherein said second array has atleast two dimensions, said second array consisting of rows and columns,and wherein each of said associated data entries has a unique pair ofrow and column indices for association with a unique pair of row andcolumn indices of a particular one of said range boundary information.40. The method of claim 38, wherein said result is a singular resultobtained by pre-processing over disjoint ranges.
 41. The method of claim38, wherein said result is a singular result selected from at least tworesults deriving from overlapping ranges by post-processing usingpriority rules.
 42. The method of claim 29, wherein said entries in saidfield of at least one ASE include single integer data, and wherein saidentries in said field of at least a second ASE includes range boundaryinformation.
 43. The method of claim 42, wherein said field of said atleast one ASE is within said first ASE.
 44. The method of claim 42,wherein said processing of said entries within said field of said firstASE and said field of said at least second ASE is sequentially orderedsuch that a single integer data field is processed first.
 45. The methodof claim 42, wherein said processing of said entries within said fieldof said first ASE and said field of said at least second ASE issequentially ordered such that: (i) any single integer data fields areprocessed prior to range fields, and (ii) among said range fields, moredisjoint fields are processed prior to less disjoint fields.
 46. Themethod of claim 29, wherein said first array in maintained in amonotonic order.
 47. The method of claim 29, wherein at least onedimension of the MDI key has a long string, said long string beinglonger than a width of a particular said ASE, and wherein said longstring is handled by splitting said long string into at least two inputkeys, each said input key for inputting in step (b) into a different oneof said first ASE and said second ASE.
 48. The method of claim 29,wherein steps (b) and (c) are pipelined to improve a performance of themethod.
 49. The method of claim 38, wherein said range boundaryinformation is a single range-boundary value.
 50. The method of claim38, further comprising the step of: (f) arranging each said rangeboundary value of said first array to produce a monotonic order.
 51. Amethod of storing data in a memory, and for extracting the datatherefrom based on a multi-dimensional input (MDI) key, the methodcomprising the steps of: (a)providing a device including: (i) aplurality of associative search engines (ASEs) including a first ASE andat least a second ASE, each ASE including: (A) a memory including: (I) afield containing a first array of cells, and (II) a second array ofcells, and (B) control logic for said memory; (b)storing a plurality ofentries within said first array of cells, such that said field isaccessible via an input key including a string, said stringcorresponding to at least a portion of the MDI key, wherein said entriesin said first array of at least one of said first ASE and said secondASE include range boundary information; (c)storing a plurality ofassociated data entries within said second array of cells, such thateach of said associated data entries is associated with a particular oneof said entries in said first array, and (d)processing said plurality ofassociated data entries so as to convert overlapping ranges within saidrange boundary information into disjoint ranges.
 52. The method of claim51, wherein said processing to produce said disjoint ranges is based onat least one pre-determined priority rule.
 53. The method of claim 51,wherein said processing to produce said disjoint ranges ispre-processing.
 54. The method of claim 51, wherein said processingfurther includes identifying at least one redundant data entry, saidredundant data entry being redundant with a particular data entry amongsaid associated data entries.
 55. The method of claim 54, wherein saidprocessing further includes eliminating said at least one redundant dataentry so as to save space in said memory.
 56. The method of claim 54,wherein corresponding to said at least one redundant data entry is atleast one entry of said entries in said field, and wherein saidprocessing further includes re-associating said entry in said field withsaid particular data entry among said associated data entries.
 57. Themethod of claim 54, wherein corresponding to said at least one redundantdata entry and said particular data entry are a particular plurality ofentries in said field, and wherein said processing further includesseparating out said particular plurality of data entries in said fieldas a common factor, so as to save space in said memory.